Gilbert Cabillic
Texas Instruments
37 Papers
313 Citations
Gilbert Cabillic is an academic researcher from Texas Instruments. The author has contributed to research in topics: Win32 Thread Information Block & Interrupt vector table. The author has an hindex of 9, co-authored 37 publications.
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Papers
Patent
Method and related system of dynamic compiler resolution
Gilbert Cabillic,Mikael Peltier,Jean-Philippe Lesot +2 more
- 26 Jul 2005
TL;DR: In this paper, a method and related system of dynamic compiler resolution is described, which is a computer-implemented method comprising compiling a source file containing an application program (the compiling creates a destination file containing a compiled version of the application program), and inserting in the compiled version, a series of commands that generate an optimized code portion using a value available at run time.
97
Patent
Energy-aware scheduling of application execution
Gerard Chauvel,Dominique D'Inverno,Serge Lasserre,Maija Kuusela,Gilbert Cabillic,Jean-Philippe Lesot,Michel Banâtre,Frédéric Parain,Jean-Paul Routeau,Salam Majoul +9 more
- 20 May 2002
TL;DR: In this paper, the set of tasks to be scheduled are divided into two (or more) subsets, which are scheduled according to different procedures in a specific embodiment, the first subset contains tasks with the highest energy consumption deviation based on the processor that executes the task.
33
Patent
Jek dynamic instrumentation
Gilbert Cabillic,Jean-Philippe Lesot +1 more
- 13 Dec 2007
TL;DR: In this paper, a method and system for performing dynamic instrumentation is described, where at least one monitor value is associated with a software monitoring handler, detecting a value within a register equal to the monitor value, and executing the monitoring handler based on the detecting.
23
Patent
Method and system for multiple object representation
Gilbert Cabillic
- 25 Jul 2005
TL;DR: In this paper, a method for multiple object representation in Java software that executes on a processor is described, which includes creating a Java representation of a system level data structure, changing a field in the Java representation, and updating a corresponding field in a system-level data structure using the contents of the field in Java representation.
20
Patent
Cache memory usable as scratch pad storage
Jean-Philippe Lesot,Gilbert Cabillic,Gerard Chauvel +2 more
- 25 Jul 2005
TL;DR: In this article, a processor adapted to couple to external memory is presented, where the data storage is usable to store local variables and temporary data and the processor is configurable to operate in either a cache policy mode in which a miss results in an access of the external memory or in a scratch pad policy mode, where a miss does not result in an external memory.
17