The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.

/pdf/high-k-materials-and-metal-gates-for-cmos-applications-4hs77i3c4a.pdf

High-K materials and metal gates for CMOS applications

The Schottky barrier height in metal/Ge contacts shows weak dependence on the metal work function indicating strong Fermi-level pinning close to the Bardeen limit. The pinning factor S is about 0.05 and the charge neutrality level (CNL) is only about 0.09eV above the top of the valence band. Because of this, the Fermi level in Ge lies higher than CNL in most cases of interest so that unpassivated acceptorlike gap states at the interface are easily filled, building up a net negative fixed charge. This could prevent efficient inversion of a p-type Ge surface in a metal-oxide-semiconductor structure.

Fermi-level pinning and charge neutrality level in germanium

ldquoConventionalrdquo techniques and related capacitance-voltage characteristic interpretation were established to evaluate interface trap density on Si substrates. We show that blindly applying these techniques on alternative substrates can lead to incorrect conclusions. It is possible to both under- and overestimate the interface trap density by more than an order of magnitude. Pitfalls jeopardizing capacitance-and conductance-voltage characteristic interpretation for alternative semiconductor MOS are elaborated. We show how the conductance method, the most reliable and widely used interface trap density extraction method for Si, can be adapted and made reliable for alternative semiconductors while maintaining its simplicity.

On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates

https://ir.nctu.edu.tw/bitstream/11536/21381/1/000316677900001.pdf

Growth, dielectric properties, and memory device applications of ZrO2 thin films

Novel high-κ dielectric materials are identified by automated ab initio calculations on ~1800 oxides. The cubic BeO is found to possess an unprecedented material property of 10 eV for band gap and 275 for dielectric constant. Candidate high-κ oxides are suggested for microelectronic devices such as CPU, DRAM and flash memory.

/pdf/novel-high-k-dielectrics-for-next-generation-electronic-4cgd423dli.pdf

Novel high-κ dielectrics for next-generation electronic devices screened by automated ab initio calculations

Thin La2O3 (LaGeOx) passivating layers combined with ZrO2 caps form a chemically stable bilayer gate stack on Ge with good electrical properties. The most important observation is that a higher-κ tetragonal zirconia phase coexists with the most commonly observed monoclinic, increasing the κ value of the oxide to about 32, thus benefiting the measured stack equivalent oxide thickness. This indicates that the ZrO2/La2O3 combination could be a promising candidate gate stack for Ge metal-oxide-semiconductor devices in terms of scalability.

Very high-κ ZrO2 with La2O3 (LaGeOx) passivating interfacial layers on germanium substrates

Electrical data on ZrO2/GeO2 stacks prepared by atomic oxygen beam deposition on Ge at 225 °C reveal a relatively weak dependence of the stack equivalent oxide thickness upon the ZrO2 thickness. This trend points to a very high zirconia dielectric permittivity (k) value which is estimated to be around 44. This is indicative of zirconia crystallization into a tetragonal phase which is also supported by x-ray diffraction data. X-ray photoelectron spectroscopy analysis is in line with the assumption that due to a finite GeO2 decomposition, Ge is incorporated into the growing ZrO2, thus, stabilizing the high-k tetragonal phase.

Germanium-induced stabilization of a very high-k zirconia phase in ZrO2/GeO2 gate stacks

Germanium metal–insulator–semiconductor capacitors with HfO2 or other high-κ gate dielectrics show unusual low frequency behavior of the high frequency (1 kHz or higher) capacitance-voltage characteristics when biased in inversion. Here, we provide evidence that this effect is partly due to the high intrinsic carrier concentration ni in Ge. We show in particular that the ac conductance in inversion is thermally activated and it is governed either by generation-recombination processes in depletion, varying proportional to ni or by diffusion-limited processes varying as ni2, depending on whether the temperature is below or above 45 °C, respectively. From these measurements, we also show that the minority carrier response time in Ge is very short, in the microsecond range (much shorter than in Si), depending inversely proportional to ni at room temperature. This means that due to high ni, the inversion charge is built fast in response to high frequency signals at the gate, inducing the observed low frequency...

Intrinsic carrier effects in HfO2–Ge metal–insulator–semiconductor capacitors

The oxidation of a Ge surface by molecular oxygen in the presence of ultrathin La, Al, and Hf layers was examined by in situ x-ray photoelectron spectroscopy. Upon exposure to O2, clean bare Ge and Hf-covered or Al-covered Ge surfaces show no Ge–O bond formation. On the contrary, a La-covered Ge surface strongly reacts with O2 forming a stable germanate LaGeOx compound. This has a beneficial side effect for the interface because the formation of volatile GeO is suppressed, resulting in the good passivating properties of LaGeOx. The photoemission results are correlated with the oxygen density differences in the corresponding oxides.

The role of La surface chemistry in the passivation of Ge

Ge-doped ZrO2 thin films are prepared on SiON/Si substrates by atomic oxygen beam deposition. It is shown that, at low growth temperatures (225–360 °C) and by using only a low amount of Ge (3–6.2 at. %), it is possible to develop a pure tetragonal zirconia phase, which remains stable after 1050 °C annealing in N2. The dielectric permittivity (k) shows pronounced correlation with the structural details of the oxide film and is increasing with Ge content to a maximum value of 37.7, which is obtained for a 6.2 at. % Ge-doped sample grown at 225 °C. The dielectric permittivity enhancement upon doping is attributed to the increase in the ZrO2 tetragonal distortion, as inferred from x-ray diffraction data. Obtaining tetragonal ZrO2 with very high k-values at low deposition temperatures and with excellent thermal stability could be beneficial for the integration of this dielectric in scaled devices requiring low equivalent oxide thickness.

Stabilization of very high-k tetragonal phase in Ge-doped ZrO2 films grown by atomic oxygen beam deposition

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