A lithographic apparatus configured to project a patterned beam of radiation onto a target portion of a substrate is disclosed. The apparatus includes a first radiation dose detector and a second radiation dose detector, each detector comprising a secondary electron emission surface configured to receive a radiation flux and to emit secondary electrons due to the receipt of the radiation flux, the first radiation dose detector located upstream with respect to the second radiation dose detector viewed with respect to a direction of radiation transmission, and a meter, connected to each detector, to detect a current or voltage resulting from the secondary electron emission from the respective electron emission surface.

Lithographic apparatus, and device manufacturing method

WHILE the introduction of statistical methods into the analysis of aeronautical experimental data, whether for quality control in production, for the interpretation of the results of structural and aerodynamic laboratory experiments, or for airline operation, has been brought about only in recent years, it may by now be fair to assert that their advantages and even their indispensability are no longer in dispute. Hitherto, investigations on these lines have usually involved, explicitly or implicitly, only the ‘normal curve of error’ and allied considerations; owing, it may be thought, to the controllability of the various manufacturing or laboratory techniques, but also perhaps to the scarcity of data hitherto available. It may well be, however, that with the accumulation of information arising out of investigations planned with particular reference to the statistical analysis of their results the whole range of the apparatus for statistical analysis, usually confined to such fields as those of biology or economics, will be called into full play.

The Statistical Analysis, of Experimental Data: A Fresh Approach Employing a Graphical Method for Investigating Non‐Normal Frequency Distributions

High-NA extreme ultraviolet (EUV) lithography is currently in development. Fabrication of exposure tools and optics with a numerical aperture (NA) equal to 0.55 has started at ASML and Carl Zeiss. Lenses with such high NA will have very small depths-of-focus, which will require improved focus systems and significant improvements in wafer flatness during processing. Lenses are anamorphic to address mask 3D issues, which results in wafer field sizes of 26 mm × 16.5 mm, half that of lower NA EUV tools and optical scanners. Production of large die will require stitching. Computational infrastructure is being created to support high-NA lithography, including simulators that use Tatian polynomials to characterize the aberrations of lenses with central obscurations. High resolution resists that meet the line-edge roughness and defect requirements for high-volume manufacturing also need to be developed. High power light sources will also be needed to limit photon shot noise.

https://iopscience.iop.org/article/10.35848/1347-4065/ac49fa/pdf

High-NA EUV lithography: current status and outlook for the future

There is provided a pellicle in which the mask-bonding agglutinant layer has the adhesion strength of 1 N/m through 100 N/m, preferably 4 N/m through 80 N/m, and more preferably the agglutinant layer has a facial flatness of 15 micrometers or smaller, and still more preferably the membrane-bonding adhesive layer has a facial flatness of 15 micrometers or smaller: for the purpose of better preventing the pellicle frame from affecting the mask to deform.

Pellicle for lithography

The Y architecture for on-chip interconnect is based on pervasive use of 0/spl deg/, 120/spl deg/, and 240/spl deg/ oriented semiglobal and global wiring. Its use of three uniform directions exploits on-chip routing resources more efficiently than traditional Manhattan wiring architecture. This paper gives in-depth analysis of deployment issues associated with the Y architecture. Our contributions are as follows. 1) We analyze communication capability (throughput of meshes) for different interconnect architectures using a multicommodity flow approach and a Rentian communication model. Throughput of the Y architecture is largely improved compared to the Manhattan architecture, and is close to the throughput of the X architecture. 2) We improve existing estimates for the wirelength reduction of various interconnect architectures by taking into account the effect of routing-geometry-aware placement. 3) We propose a symmetrical Y clock tree structure with better total wire length compared to both H and X clock tree structures, and better path length compared to the H tree. 4) We discuss power distribution under the Y architecture, and give analytical and SPICE simulation results showing that the power network in Y architecture can achieve (8.5%) less IR drop than an equally resourced power network in Manhattan architecture. 5) We propose the use of via tunnels and banks of via tunnels as a technique for improving routability for Manhattan and Y architectures.

/pdf/the-y-architecture-for-on-chip-interconnect-analysis-and-5g9568x8a7.pdf

The Y-Architecture for On-Chip Interconnect: Analysis and Methodology

Mask writers’ architectures have evolved through the years in response to ever tightening requirements for better resolution, tighter feature placement, improved CD control, and tolerable write time. The unprecedented extension of optical lithography and the myriad of Resolution Enhancement Techniques have tasked current mask writers with ever increasing shot count and higher dose, and therefore, increasing write time. Once again, we see the need for a transition to a new type of mask writer based on massively parallel architecture. These platforms offer a step function improvement in both dose and the ability to process massive amounts of data. The higher dose and almost unlimited appetite for edge corrections open new windows of opportunity to further push the envelope. These architectures are also naturally capable of producing curvilinear shapes, making the need to approximate a curve with multiple Manhattan shapes unnecessary.

Mask data processing in the era of multibeam writers

Mask patterning capability continues to be a key enabler for wafer patterning. Mask writer performance is critical to meet reticle resolution, critical dimension uniformity, registration, and throughput requirements. Technology trends indicate that mask requirements will require higher dose resists with more complex designs producing write time growth that significantly exceeds Moore’s law estimates. Sub 10 nm technology node requirements may exceed what is practically or economically achievable using conventional single beam writers. This is driving the need to explore alternative e-beam mask writer architectures for future nodes. Several equipment suppliers are proposing new architectures for mask patterning. These approaches share the characteristic of some level of parallelism to solve the throughput challenge caused by increasing mask pattern complexity. Although parallelism is a proven approach in laser mask writers, it has not been integrated into an e-beam platform. All of the approaches for multibeam e-beam architectures have unique technical difficulties. In some cases, suppliers have produced proof of concept results to demonstrate the feasibility of their approach and address key technical risks. Although these results are encouraging, it is clear that they need more time and industry assistance to produce a commercially worthy mask writer. Key drivers will be considered. Proposed evolutionary extensions of the current architecture will be evaluated. The need for revolutionary architectures to satisfy future mask patterning will be explored.

Future mask writers requirements for the sub-10nm node era

With the persistent drive to enable EUV lithography (EUVL) for the continuation of pattern scaling and the close collaborations between suppliers and customers, tremendous progress has been made in the last five years in EUV mask infrastructure development. With the advent of actinic pattern mask inspection (APMI) tool, the only remaining EUV mask infrastructure gap until recently has been closed. We will present real-case examples from inspection of 7nm and 5nm logic node EUV masks with APMI in operation at Intel mask shop and demonstrate that actinic inspection provides defect detection capability beyond the traditional DUV optical and e-beam mask inspection (EBMI) tools for defect control and the guaranty of mask quality. In addition to the main focus on APMI and through-pellicle inspection in this paper, we also provide a brief discussion of other key EUV infrastructure modules for mask production in current EUVL at 0.33NA and future technology extension to enable high NA EUVL at 0.55NA.

EUV mask infrastructure and actinic pattern mask inspection

Low stress reticle pellicle assemblies. In accordance with certain embodiments of the present invention, a pellicle frame of reduced stiffness is employed to reduce the stress a pellicle frame induces in a reticle plate. In other embodiments, a pellicle frame of reduced adhesive surface is employed to reduce the stress a pellicle frame induces in a reticle plate. In accordance with still other embodiments, a stress compensating frame is employed to reduce the cumulative stresses in an assembly comprising the reticle plate, pellicle and stress compensating frame.

Low stress pellicle frames and reticle pellicle assemblies

MEBESR 50 kV mask pattern generators use Raster GraybeamTM writing, providing an effective grid that is 32X finer than the print grid. The electron beam size and print pixel size are variable between 60 nm and 120 nm, allowing a tradeoff between resolution and write time. Raster scan printing optimizes throughput by transferring precisely the amount of data to the mask that is consistent with the chosen resolution. As with other raster output devices, mask write times are not affected by pattern complexity. This paper examines the theoretical performance of Raster Graybeam for model-based optical proximity correction (OPC) patterns and provides examples of mask patterning performance. A simulation tool is used to model the MEBES eXaraTM system writing strategy, which uses four writing passes, interstitial print grids, offset scans, and eight dose levels per pass. It is found that Raster Graybeam produces aerial image quality equivalent to the convolution of the input pattern data with a Gaussian point spread function. Resolution of 90 nm is achieved for equal lines and spaces, supporting subresolution assist features. Angled features are a particular strength of raster scan patterning, with feature quality and write time that are independent of feature orientation.

Evaluation of OPC mask printing with a raster scan pattern generator

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