In this paper we present a survey of existing prototypes dedicated to software defined radio. We propose a classification related to the architectural organization of the prototypes and provide some conclusions about the most promising architectures. This study should be useful for cognitive radio testbed designers who have to choose between many possible computing platforms. We also introduce a new cognitive radio testbed currently under construction and explain how this study have influenced the test-bed designers choices.

/pdf/software-defined-radio-architecture-survey-for-cognitive-y8ic6831jn.pdf

Software defined radio architecture survey for cognitive testbeds

Space modulation is a group of multiple-input multiple-output (MIMO) techniques that attracted significant research interests lately. However, the aspect of implementation approaches and software defined radio (SDR) has been so far very limited. The aim of this paper is to propose a novel single SDR platform architecture that implements different space modulation techniques using currently available commercial off-the-shelf components. The proposed platform architecture can be dynamically reconfigured to implement different space modulation techniques with marginal to almost no extra hardware overhead. The impact of different hardware components that have to be considered to realize such an implementation is also analyzed and studied.

A Reconfigurable SDR Transmitter Platform Architecture for Space Modulation MIMO Techniques

A new, low-power software-defined radio baseband supports up to 600 Mbps. Wireless LAN and WiMax are implemented on a dynamically reconfigurable processor that's fully utilized in the baseband operation. Power is estimated at 500 mW in a 40-nm CMOS design. The platform also permits fast runtime switching between multiple wireless standards.

High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors

Software defined radio (sdr) technology has evolved rapidly and is now reaching market maturity, providing solutions for cognitive radio applications. Still, a lot of issues have yet to be studied. In this paper, we highlight the constraints imposed by recent radio protocols and we present current architectures and solutions for programming sdr. We also list the challenges to overcome in order to reach mastery of future cognitive radios systems.

https://hal.inria.fr/hal-00859467/document

Cognitive Radio Programming: Existing Solutions and Open Issues

This thesis presents a highly automated design framework, called DaedalusRT, and several novel techniques. As the foundation of the DaedalusRT design framework, two types of dataflow Models-of-Computation (MoC) are used, one as timing analysis model and another one as the implementation model. The timing analysis model is used to formally reason about timing behavior of an application. In the context of DaedalusRT, the Mode-Aware Data Flow (MADF) MoC has been developed as the timing analysis model for adaptive streaming applications using different static modes. A novel mode transition protocol is devised to allow efficient reasoning of timing behavior during mode transitions. Based on the transition protocol, a hard real-time scheduling approach is proposed. On the other hand, the implementation model is used for efficient code generation of parallel computation, communication, and synchronization. In this thesis, the Parameterized Polyhedral Process Network (P3N) MoC has been developed to model adaptive streaming applications with parameter reconfiguration. An approach to verify the functional property of the P3N MoC has been devised. Finally, implementation of the P3N MoC on a MPSoC platform has shown that run-time performance penalty due to parameter reconfiguration is negligible.

/pdf/adaptive-streaming-applications-analysis-and-implementation-4hfm2y9w8b.pdf

Adaptive streaming applications : analysis and implementation models

The architecture and implementation of a Software Defined Radio (SDR) multi-standard baseband processor are presented. As the first representative of a new SDR baseband family, the X-GOLDTM SDR20 has been successfully designed and fabricated in a 65nm CMOS process. The physical layer signal processing for GSM, EDGE, GPRS, UMTS, HSPA, GMR1-3G, and LTE can be implemented in software on this single-chip device. Respective GSM, UMTS and LTE lab demonstrations have proven the competitiveness of this SDR approach.

Architecture and implementation of a Software-Defined Radio baseband processor

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Architecture and implementation of a Software-Defined Radio baseband processor