Erkan Diken
Eindhoven University of Technology
15 Papers
95 Citations
Erkan Diken is an academic researcher from Eindhoven University of Technology. The author has contributed to research in topics: Very long instruction word & SIMD. The author has an hindex of 6, co-authored 15 publications. Previous affiliations of Erkan Diken include University of Science and Technology of China.
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Papers
ASAM: Automatic architecture synthesis and application mapping
Lech Jozwiak,Menno Lindwer,Rosilde Corvino,Paolo Meloni,Laura Micconi,Jan Madsen,Erkan Diken,Deepak Gangadharan,Roel Jordans,Sebastiano Pomata,Paul Pop,Giuseppe Tuveri,Luigi Raffo,Giuseppe Notarangelo +13 more
TL;DR: An overview of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program is presented, which system, design, and electronic design automation (EDA) concepts seem to be adequate to address the challenges and solve the problems.
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ASAM: Automatic Architecture Synthesis and Application Mapping
Lech Jozwiak,Menno Lindwer,Rosilde Corvino,Paolo Meloni,Laura Micconi,Jan Madsen,Erkan Diken,Deepak Gangadharan,Roel Jordans,Sebastiano Pomata,Paul Pop,Giuseppe Tuveri,Luigi Raffo +12 more
- 05 Sep 2012
TL;DR: An over-view of the research being currently performed in the scope of the European project ASAM of the ARTEMIS program is presented and which system, design, and electronic design automation concepts seem to be adequate to resolve the problems and address the challenges.
Construction and exploitation of VLIW ASIPs with heterogeneous vector-widths
TL;DR: The use of heterogeneous vector widths and a method to explore the heterogeneousvector widths for VLIW ASIPs are proposed and the associated design automation tools are explained.
13
A configurable SIMD architecture with explicit datapath for intelligent learning
Yifan He,Maurice Peemen,Luc Waeijen,Erkan Diken,Mattia Fiumara,Gerard Rauwerda,Henk Corporaal,Tong Geng +7 more
- 17 Jul 2016
TL;DR: A multiply-accumulate (MAC) unit with variable number of accumulator registers is proposed based on the design framework for low-power SIMD processors that exploits both the merits of merged operation and register tiling.
13
A middleware approach to achieving fault tolerance of Kahn process networks on networks on chips
TL;DR: This work proposes a task-aware middleware concept that allows adaptivity in KPN implemented over a Network on Chip (NoC) and extends the SACRE (Self-Adaptive Component Run Time Environment) framework by integrating it with an open source NoC simulator, Noxim.