Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spontaneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high-voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench-structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics.

https://hal.archives-ouvertes.fr/hal-03421528/document

GaN-based power devices: Physics, reliability, and perspectives

The dynamic on -state resistance ( R DSON) behavior of commercial GaN devices is very important for a GaN-based converter. Since the zero-voltage switching techniques are popular in high-frequency power conversion, a dynamic R DSON test board integrating both hard- and soft-switching test circuits is built in this study. Two types of commercial GaN devices are tested and compared under hard- and soft-switching conditions by double-pulse and multipulse test modes, respectively. It has been found that their dynamic R DSON exhibit different behaviors depending on the off -state voltage and frequency under hard- and soft-switching conditions due to different device technologies, which should be taken fully into account for GaN-based converter design and loss estimation. In order to simulate the R DSON behavior in a steady-state operating converter, a multipulse measurement has been implemented, the results of which are compared with that of double-pulse test. Furthermore, the primary trapping mechanisms responsible for dynamic R DSON increase under different switching conditions are identified and verified by the numerical device simulation using Silvaco TCAD tool.

Dynamic on -State Resistance Test and Evaluation of GaN Power Devices Under Hard- and Soft-Switching Conditions by Double and Multiple Pulses

Gallium nitride (GaN) power devices enable power electronic systems with enhanced power density and efficiency. Dynamic on-resistance ( $R_{\mathrm{\scriptscriptstyle ON}}$ ) degradation (or current collapse), originating from buffer trapping, surface trapping and gate instability, has been regarded as a primary challenge for the lateral GaN-on-Si power devices. In this paper, we present an overview and discussion of the mechanisms, characterizations, modeling, and solutions for the degradation of dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ in GaN power devices. The complex dynamics of acceptor/donor buffer traps and their impacts on dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ have been analyzed and revealed by TCAD simulations and high-voltage back-gating measurements. The gate instability-induced dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ increase in different GaN device technologies and the role of gate overdrive are also discussed. Wafer-level and board-level characterization techniques enabling accurate dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ evaluation are reviewed. The dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ performance of the state-of-the-art commercial GaN devices is presented, and a behavioral model with the dynamic $R_{\mathrm{\scriptscriptstyle ON}}$ degradation taken into consideration has been implemented for circuit analysis. The latest progress in GaN device technologies for enhanced dynamic performance is also reviewed and discussed.

Dynamic On-Resistance in GaN Power Devices: Mechanisms, Characterizations, and Modeling

In this article, an artificial neural network (ANN)-based large-signal model (LSM) of AlGaN/GaN high electron mobility transistors (HEMTs) with accurate buffer-related trapping effects characterization and modeling is proposed. A hybrid small-signal parameter-extraction method for AlGaN/GaN HEMTs is used to acquire the parasitic parameters. To simplify the modeling procedure of the drain–source current $I_{\mathrm{ ds}}$ , an ANN-based model associated with the empirical equations taking into account the trapping effects, self-heating effects, and breakdown issue is developed. The low-frequency dispersions related to the buffer-related trapping effects have been well modeled by using a new empirical equation, which has been verified by small-signal S-parameters. Also, a new thermal factor $K_{T}$ and an improved Shockley diode equation are given in the proposed model as well. The developed LSM has been fully verified by a $2\times 100\,\,\mu \text{m}$ AlGaN/GaN HEMT with the pulsed I–V, small-signal S-parameters, power sweep, and load—pull measurements.

ANN-Based Large-Signal Model of AlGaN/GaN HEMTs With Accurate Buffer-Related Trapping Effects Characterization

Current collapse modeling in AlGaN/GaN HEMT using small signal equivalent circuit for high power application

In this letter, we investigated the behaviors of surface- and buffer-induced current collapse in AlGaN/GaN high-electron mobility transistors (HEMTs) using a soft-switched pulsed $I-V$ measurement with different quiescent bias points. It is found that the surface- and buffer-related current collapse have different relationship with the gate and drain biases ( V $_{\mathrm { {\!GS0,}}}$ V $_{\mathrm { {\!DS0}}}$ ) during quiescent bias stress. The surface-induced current collapse in devices without passivation monotonically increases with the negative V $_{\mathrm { {\!GS0}}}$ , suggesting that an electron injection to the surface from gate leakage is the dominant mechanism and the Si3N4 passivation could effectively eliminate such current collapse. The buffer-induced current collapse in devices with intentionally carbon-doped buffer layer exhibits a different relationship with V $_{\mathrm { {\!GS0}}}$ after surface passivation. The buffer-related current collapse shows a bell-shaped behavior with V $_{\mathrm { {\!GS0}}}$ , suggesting that a hot electron trapping in the buffer is the dominant mechanism. The soft-switched pulsed $I-V$ measurement provides an effective method to distinguish between the surface- and buffer-related current collapse in group III-nitride HEMTs.

Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed $I-V$ Measurement

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Investigation of Surface- and Buffer-Induced Current Collapse in GaN High-Electron Mobility Transistors Using a Soft Switched Pulsed \(I-V\) Measurement