Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.

Methods and systems for utilizing design data in combination with inspection data

Methods and systems for determining a critical dimension and overlay of a specimen

Methods and systems for determining a critical dimension and a thin film characteristic of a specimen

In the semiconductor device of the present invention, a plurality of dummy patterns are formed in a grid arrangement in the scribe line areas of a wafer, and a plurality of dummy patterns are formed in a diagonally forward skipped arrangement in the chip interior areas of the wafer. Altering the arrangement of dummy patterns in the chip interior areas and scribe line areas in this way enables formation of dummy patterns with greater uniformity in the chip interior areas and enables formation of dummy patterns with greater resistance to loss that occurs when dicing in scribe line areas.

Semiconductor device and method of fabricating semiconductor device with high CMP uniformity and resistance to loss that occurs in dicing

An inspection apparatus and a semiconductor device manufacturing method using the same. The inspection apparatus is used for defect inspection, line width measurement, surface potential measurement or the like of a sample such as a wafer. In the inspection apparatus, a plurality of charged particles is delivered from a primary optical system to the sample, and secondary charged particles emitted from the sample are separated from the primary optical system and introduced through a secondary optical system to a detector. Irradiation of the charged particles is conducted while moving the sample. Irradiation spots of the charged particles are arranged by N rows along a moving direction of the sample and by M columns along a direction perpendicular thereto. Every row of the irradiation spots of the charged particles is shifted successively by a predetermined amount in a direction perpendicular to the moving direction of the sample.

Inspection system by charged particle beam and method of manufacturing devices using the system

Disclosed is a method for detecting electrical defects on test structures of a semiconductor die. The test structures includes a plurality of electrically-isolated test structures and a plurality of non-electrically-isolated test structures. The test structures each has a portion located partially within a scan area. The portion of the test structures located within the scan area is scanned to obtain voltage contrast images of the test structures' portions. In a multi-pixel processor, the obtained voltage contrast images are analyzed to determine whether there are defects present within the test structures. In a preferred embodiment, the multi-pixel processor operates with pixel resolution sizes in a range of about 25 nm to 200 nm. In another aspect, the processor operates with a pixel size nominally equivalent to two times a width of the test structure's line width to maximize throughput at optimal signal to noise sensitivity. A computer readable medium having programming instructions for performing the above described methods is also disclosed.

Multi-pixel methods and apparatus for analysis of defect information from test structures on semiconductor devices

Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.

Test structures and methods for inspection of semiconductor integrated circuits

Disclosed is a method of inspecting a sample. The sample is scanned in a first direction with at least one particle beam. The sample is scanned in a second direction with at least one particle beam. The second direction is at an angle to the first direction. The number of defects per an area of the sample are found as a result of the first scan, and the position of one or more of the found defects is determined from the second scan. In a specific embodiment, the sample includes a test structure having a plurality of test elements thereon. A first portion of the test elements is exposed to the beam during the first scan to identify test elements having defects, and a second portion of the test elements is exposed during the second scan to isolate and characterize the defect.

Multiple directional scans of test structures on semiconductor integrated circuits

An apparatus and method for inspecting a surface of a sample, particularly but not limited to a semiconductor device, using an electron beam is presented. The technique is called Secondary Electron Emission Microscopy (SEEM), and has significant advantages over both Scanning Electron Microscopy (SEM) and Low Energy Electron Microscopy (LEEM) techniques. In particular, the SEEM technique utilizes a beam of relatively high-energy primary electrons having a beam width appropriate for parallel, multi-pixel imaging. The electron energy is near a charge-stable condition to achieve faster imaging than was previously attainable with SEM, and charge neutrality unattainable with LEEM. The emitted electrons may be detected using a time delay integration detector.

Apparatus and method for secondary electron emission microscope

Disclosed is a method of inspecting a sample. The method includes moving to a first field associated with a first group of test structures. The first group of test structures are partially within the first field. The method further includes scanning the first field to determine whether there are any defects present within the first group of test structures. When it is determined that there are defects within the first group of test structures, the method further includes repeatedly stepping to areas and scanning such areas so as to determine a specific defect location within the first group of test structures. A suitable test structure for performing this method is also disclosed.

Stepper type test structures and methods for inspection of semiconductor integrated circuits

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