The accumulation of physical errors1-3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm5. We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes6. Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code7-10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length-n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors. 

pdf/high-threshold-and-low-overhead-fault-tolerant-quantum-mlemighs3y.pdf

High-threshold and low-overhead fault-tolerant quantum memory

Quantum error correction becomes a practical possibility only if the physical error rate is below a threshold value that depends on a particular quantum code, syndrome measurement circuit, and decoding algorithm. Here we present an end-to-end quantum error correction protocol that implements fault-tolerant memory based on a family of LDPC codes with a high encoding rate that achieves an error threshold of $0.8\%$ for the standard circuit-based noise model. This is on par with the surface code which has remained an uncontested leader in terms of its high error threshold for nearly 20 years. The full syndrome measurement cycle for a length-$n$ code in our family requires $n$ ancillary qubits and a depth-7 circuit composed of nearest-neighbor CNOT gates. The required qubit connectivity is a degree-6 graph that consists of two edge-disjoint planar subgraphs. As a concrete example, we show that 12 logical qubits can be preserved for nearly one million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of $0.1\%$. We argue that achieving the same level of error suppression on 12 logical qubits with the surface code would require nearly 3000 physical qubits. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.

pdf/high-threshold-and-low-overhead-fault-tolerant-quantum-lazudicj45.pdf

While quantum computers promise to solve some scientifically and commercially valuable problems thought intractable for classical machines, delivering on this promise will require a large-scale quantum machine. Understanding the impact of architecture design choices for a scaled quantum stack for specific applications, prior to full realization of the quantum system, is an important open challenge. To this end, we develop a framework for quantum resource estimation, abstracting the layers of the stack, to estimate resources required across these layers for large-scale quantum applications. Using a tool that implements this framework, we assess three scaled quantum applications and find that hundreds of thousands to millions of physical qubits are needed to achieve practical quantum advantage. We identify three qubit parameters, namely size, speed, and controllability, that are critical at scale to rendering these applications practical. A goal of our work is to accelerate progress towards practical quantum advantage by enabling the broader community to explore design choices across the stack, from algorithms to qubits.

Assessing requirements to scale to practical quantum advantage

Establishing the nature of the ground state of the Heisenberg antiferromagnet (HAFM) on the kagome lattice is well known to be a prohibitively difficult problem for classical computers. Here, we give a detailed proposal for a Variational Quantum Eigensolver (VQE) with the aim of solving this physical problem on a quantum computer. At the same time, this VQE constitutes an explicit proposal for showing a useful quantum advantage on Noisy Intermediate-Scale Quantum (NISQ) devices because of its natural hardware compatibility. We classically emulate a noiseless quantum computer with the connectivity of a 2D square lattice and show how the ground state energy of a 20-site patch of the kagome HAFM, as found by the VQE, approaches the true ground state energy exponentially as a function of the circuit depth. Besides indicating the potential of quantum computers to solve for the ground state of the kagome HAFM, the classical emulation of the VQE serves as a benchmark for real quantum devices on the way towards a useful quantum advantage.

Variational quantum eigensolver for the Heisenberg antiferromagnet on the kagome lattice

Gate-based quantum computers typically encode and process information in two-dimensional units called qubits. Using d-dimensional qudits instead may offer intrinsic advantages, including more efficient circuit synthesis, problem-tailored encodings and embedded error correction. In this work, we design a superconducting qudit-based quantum processor wherein the logical space of transmon qubits is extended to higher-excited levels. We propose a universal gate set featuring a two-qudit cross-resonance entangling gate, for which we predict fidelities beyond 99% in the d=4 case of ququarts with realistic experimental parameters. Furthermore, we present a decomposition routine that compiles general qudit unitaries into these elementary gates, requiring fewer entangling gates than qubit alternatives. As proof-of-concept applications, we numerically demonstrate the synthesis of SU(16) gates for noisy quantum hardware and an embedded error-correction sequence that encodes a qubit memory in a transmon ququart to protect against pure dephasing noise. We conclude that universal qudit control—a valuable extension to the operational toolbox of superconducting quantum information processing—is within reach of current transmon-based architectures and has applications to near-term and long-term hardware.5 MoreReceived 20 December 2022Revised 2 June 2023Accepted 12 July 2023DOI:https://doi.org/10.1103/PRXQuantum.4.030327Published by the American Physical Society under the terms of the Creative Commons Attribution 4.0 International license. Further distribution of this work must maintain attribution to the author(s) and the published article's title, journal citation, and DOI.Published by the American Physical SocietyPhysics Subject Headings (PhySH)Research AreasQuantum computationQuantum error correctionQuantum information processingQuantum InformationCondensed Matter, Materials & Applied Physics 

pdf/universal-qudit-gate-synthesis-for-transmons-bvxhxxibnk.pdf

Universal Qudit Gate Synthesis for Transmons

For the first time in history, we are seeing a branching point in computing paradigms with the emergence of quantum processing units (QPUs). Extracting the full potential of computation and realizing quantum algorithms with a super-polynomial speedup will most likely require major advances in quantum error correction technology. Meanwhile, achieving a computational advantage in the near term may be possible by combining multiple QPUs through circuit knitting techniques, improving the quality of solutions through error suppression and mitigation, and focusing on heuristic versions of quantum algorithms with asymptotic speedups. For this to happen, the performance of quantum computing hardware needs to improve and software needs to seamlessly integrate quantum and classical processors together to form a new architecture that we are calling quantum-centric supercomputing. In the long term, we see hardware that exploits qubit connectivity in higher than 2D topologies to realize more efficient quantum error correcting codes, modular architectures for scaling QPUs and parallelizing workloads, and software that evolves to make the intricacies of the technology invisible to the users and realize the goal of ubiquitous, frictionless quantum computing.

https://aip.scitation.org/doi/pdf/10.1063/5.0082975

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The future of quantum computing with superconducting qubits

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