The invention concerns a method for producing a hybrid substrate, comprising a support substrate (40), a continuous buried insulator layer (42) and, on this layer, a hybrid layer (26) comprising alternating zones of a first material (26) and at least one second material (32), wherein these two materials are different by their nature and/or their crystallographic characteristics, said method comprising: the formation of a hybrid layer (26), comprising alternating zones of first and second materials, on a homogeneous substrate (22), an intermediate step of assembly of the free surface of the hybrid layer, or of a dielectric fromed on this surface, with a buffer substrate, the assembly of this hybrid layer, the continuous insulator layer (42) and the support substrate (40), the elimination of a part at least of the homogeneous substrate (40), before or after the assembly step.

Method for producing hybrid components

An alternative technology is studied here to elaborate hybrid orientation silicon on insulator (SOI) films above a continuous buried oxide (BOX). To this purpose, a “deep-amorphization” followed by solid phase epitaxial regrowth (SPER) of SOI films is investigated. The effect of the deep-amorphization and SPER on p-type fully-depleted metal oxide semiconductor field effect transistors (FD-MOSFETs) electrical characteristics is presented and discussed for both (1 0 0) and (1 1 0) oriented SOI films. High performance pMOS were realized on (1 1 0) substrates. Our results show a +30% gain on the drive current for the (1 1 0) surface orientation, and we further demonstrate that no degradation of the performance is introduced by the amorphization and SPER processes.

Fully depleted silicon on insulator MOSFETs on (1 1 0) surface for hybrid orientation technologies

La densite des dispositifs dans les circuits integres n'a cesse d'augmenter exponentiellement depuis les annees 1970, mais il devient de plus en plus difficile de reduire davantage certains des parametres Le silicium, base de la technologie CMOS, est connu pour etre un materiau piezoresitif On peut donc ameliorer les performances des dispositifs a l'aide des contraintes mecaniques Cette these vise a etudier dans le detail comment les techniques de fabrication induisant des contraintes mecaniques modifient le comportement electrique des transistors, et ceci pour les generations CMOS 65nm et en deca La comprehension des mecanismes physiques, et la resolution des problemes d'integration technologique ont ete les motivations principales, qui s’est concentree sur trois techniques generatrices des contraintes : l’isolation par tranchees, le depot des couches d’arret de la gravure des contacts, et la memorisation des contraintes du materiau de grille Nous nous sommes egalement interesses a l'influence de l'orientation du cristal L'impact de ces procedes induisant des contraintes sur les dispositifs a donc ete evalue en fonction des parametres materiaux et des dimensions des transistors

Etude des effets des contraintes mécaniques induites par les procédés de fabrication sur le comportement électrique des transistors CMOS des noeuds technologiques 65nm et en deça

In this paper, for the hybrid orientation technology (HOT), we propose a modified amorphization/templated recrystallization (ATR) process to improve the material quality. The characterization of Si/SiO2 interface properties for complementary metal-oxide-semiconductor (CMOS) devices fabricated on HOT wafers is demonstrated through charge pumping (CP) and low-frequency (1/f) noise measurements simultaneously. For n-type metal-oxide-semiconductor field-effect transistors (nMOSFETs), devices with the increased defect-removal annealing time bring out a significant decrease in the CP current and the 1/f noise. The results indicate that ATR-induced defects are further repaired and consequently achieve a well Si/SiO2 interface. In addition, the driving current improvement is observed in devices with a small dimension utilizing the modified ATR process. For p-type MOSFETs (pMOSFETs), the direct-current characteristic, CP, and 1/f noise results are comparable between both HOT wafers. It means that the modified process would not affect bonded (110) regions and degrade the device performance. Hence, this modified process could be adopted to improve the fabrication of the CMOS on the HOT wafer using the ATR method. Moreover, the physical origins of the 1/f noise is attributed to a fluctuation in the mobility of free carriers for pMOSFETs and a unified model, incorporating both the carrier- number and correlated mobility fluctuations, for nMOSFETs.

Characteristics of $\hbox{Si/SiO}_{2}$ Interface Properties for CMOS Fabricated on Hybrid Orientation Substrate Using Amorphization/Templated Recrystallization (ATR) Method

A method for producing a hybrid substrate includes preparing a first substrate including a mixed layer and an underlying electrically insulating continuous layer, the mixed layer made up of first single-crystal areas and second adjacent amorphous areas, the second areas making up at least part of the free surface of the first substrate. A second substrate is bonded to the first substrate, the second substrate including on the surface thereof, a reference layer with a predetermined crystallographic orientation. The first substrate is bonded to the second substrate by hydrophobic molecular bonding of at least the amorphous areas. A recrystallisation of at least part of the amorphous areas to solid phase is carried out according to the crystallographic orientation of the reference layer, and the two substrates are separated at the bonding interface.

Method of producing a hybrid substrate having a continuous buried eectrically insulating layer

Novel silicon-on-insulator (SOI) structures are presented on hybrid orientation substrates (SuperHOT), i.e. with nFETs on (100) surface orientation and pFETs on (110) orientation, using silicon lateral overgrowth. Functional SOI MOSFETs and ring oscillators are demonstrated

Silicon-on-Insulator MOSFETs with Hybrid Crystal Orientations

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Silicon-on-Insulator MOSFETs with Hybrid Crystal Orientations