After two decades of intensive development, 3-D integration has proven invaluable for allowing integrated circuits to adhere to Moore’s Law without needing to continuously shrink feature sizes The 3-D integration is also an enabling technology for hetero-integration of microelectromechanical systems (MEMS)/microsensors with different technologies, such as CMOS and optoelectronics This 3-D hetero-integration allows for the development of highly integrated multifunctional microsystems with small footprints, low cost, and high performance demanded by emerging applications This paper reviews the following aspects of the MEMS/microsensor-centered 3-D integration: fabrication technologies and processes, processing considerations and strategies for 3-D integration, integrated device configurations and wafer-level packaging, and applications and commercial MEMS/microsensor products using 3-D integration technologies Of particular interest throughout this paper is the hetero-integration of the MEMS and CMOS technologies [2015-0158]

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

We report on the characterization of four HAWAII Hybrid Si CMOS detectors (HCD) developed for use as X-ray
detectors as part of a joint program between Penn State University and Teledyne Imaging Sensors (TIS).
Interpixel capacitive crosstalk (IPC) has been measured for standard H1RG detectors as well as a specially
developed H2RG that uses a unique bonding structure. The H2RG shows significant reduction in IPC, as reported
by Griffith et al. 2012. Energy resolution at 1.5 & 5.9 keV was measured as well as read noise for each detector.
Dark current as a function of temperature is reported from 150 – 210 K and dark current figures of merit are
estimated for each detector. We also discuss upcoming projects including testing of a new HCD called the
Speedster-EXD. This prototype detector will have a low noise, high gain CTIA to reduce IPC and read noise as
well as in-pixel CDS and event flagging. In the coming year PSU and TIS will begin work on a project to
incorporate CTIA and CDS circuitry into the ROIC of a HAWAII HCD like detector to satisfy the small pixel and
high rate needs of future X-ray observatories.

Characterization of Si hybrid CMOS detectors for use in the soft x-ray band

An advanced silicon-on-insulator (SOI) pixel sensor with an anti-punch-through structure is proposed to suppress the effect of total ionizing dose (TID) and crosstalk between the electronics and the sensor. A buried p-well (BPW) and a buried n-well (BNW) are both connected to their respective voltages to shield SOI circuits from the sensor. BNW is used as an electrode with controllable potential, which provides similar functionality as middle silicon in double SOI (DSOI). The biased BPW and anti-punch-through implant are adopted to form a potential barrier to holes in BPW. The lateral electric fields induced by the sidewalls of the pixel accelerate electrons to the N+ charge collector. 2-D and 3-D physical-level simulations are presented to compare this structure with DSOI. The simulation results show that an appropriate operating biasing voltage under a fully depleted condition can be secured by adjusting the anti-punch-through doping. The TID effects, the parasitic capacitance between the electronics and the charge collector, and the charge collection efficiency have been studied.

An Advanced SOI Pixel Sensor With Anti-Punch-Through Implantation

We have developed a hybrid Active Pixel Sensor for detecting low energy X-rays. The sensor consists of a silicon diode detector array built on a high resistivity wafer and an SOI CMOS readout circuit, connected together by means of unique 3D integration technology developed at MIT Lincoln Laboratory. In this paper we will describe measurements of sense node capacitance and device depletion depth along with corresponding simulations aimed to optimize device performance. We also describe race condition in the column decoder and identify ways to eliminate it in order to reduce fixed pattern noise.

/pdf/measurement-results-for-an-x-ray-3d-integrated-active-pixel-4jq1teplls.pdf

Measurement results for an x-ray 3D-integrated active pixel sensor

We have been developing a monolithic active pixel sensor with the 0.2 μm Silicon-On-Insulator (SOI) CMOS technology, i.e. SOIPIX, for the X-ray imaging spectroscopy on future astronomical satellites. SOIPIX includes a thin CMOS readout layer and a thick high-resistivity Si-sensor layer vertically on a single chip, which would provide advantages in capabilities of direct and flexible readout circuitries over charge-coupled device (CCD). We have built INTPIX2/3 (2008/2009) and XRPIX1(2010). We successfully confirmed the capability of X-ray imaging and spectroscopy in a photon-counting mode by irradiating INTPIX2/3 with monochromatic X-rays. To reduce the readout noise, we designed and built XRPIX1, which has a correlated double sampling (CDS) readout circuit in each pixel to suppress the reset noise. We obtained an energy resolution of FWHM ∼1.5 keV(7%)@22 keV with XRPIX1 cooled at 50 degree. Moreover, XRPIX1 offers intra-pixel hit trigger and one-dimensional hit-pattern outputs. We also confirmed the trigger capability by irradiating a single pixel of XRPIX1 with laser light.

Development of X-ray imaging spectroscopy sensor with SOI CMOS technology

We have developed a back-illuminated active pixel sensor (APS) which includes an SOI readout circuit and a silicon diode detector array implemented in a separate high-resistivity wafer. Both are connected together using a per-pixel 3-D integration technique developed at Lincoln Laboratory. The device was fabricated as part of a program to develop a photon-counting APS for imaging spectroscopy in the soft X-ray (0.3-10-keV) spectral band. Here, we report single-pixel X-ray response with spectral resolution of 181-eV full-width at half-maximum at 5.9 keV. The X-ray data allow us to characterize the responsivity and input-referred noise properties of the device. We measured interpixel crosstalk and found large left-right asymmetry explained by coupling of the sense node to the source follower output. We have measured noise parameters of the SOI transistors and determined factors which limit the device performance.

/pdf/characterization-of-three-dimensional-integrated-active-2wydpgw2pn.pdf

Characterization of Three-Dimensional-Integrated Active Pixel Sensor for X-Ray Detection

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Characterization of Three-Dimensional-Integrated Active Pixel Sensor for X-Ray Detection