This paper describes a solid-state sensor for ultra-high-speed (UHS) imaging. The ‘Kirana’ sensor was designed and manufactured in a 180 nm CMOS technology to achieve full-frame 0.7 Megapixel video capture at speeds at 2 MHz. The 30 μm pixels contain a pinned photodiode, a set of 180 low-leakage storage cells, a floating-diffusion, and a source follower output structure. Both the individual cells and the way they are arranged in the pixel are novel. The pixel architecture allows correlated double sampling for low noise operation. In the fast mode, the storage cells are operated as a circular buffer, where 180 consecutive frames are stored until receipt of a trigger; up to 5 video-bursts per second can be read out. In the ‘slow’ mode, the storage cells act like a pipeline; the sensor can be read out like a conventional sensor at a continuous frame rate of 1,180 fps. The sensor architecture is fully scalable in resolution since memory cells are located inside each pixel. The pixel architecture is scalable in memory depth (number of frames) as a trade-off with pixel size, dependent on application. The present implementation of 0.7 Mpixels has an array focal plane which is optimized for standard 35 mm optics, whilst offering a competitive 180-frame recording depth. The sensor described has been manufactured and is currently being characterized. Operation of the sensor in the fast mode at 2 million frames per second has been achieved. Details on the camera/sensor operation are presented together with first experimental results.

Kirana: a solid-state megapixel uCMOS image sensor for ultrahigh speed imaging

In this paper, we demonstrate the technologies r elated to the pixel structure achieving the fully charge transfer time of less than 10 nsec for the 20M frame per second burst CMOS image sensor. In this image sensor, t he size of the photodiode ( PD ) is 30.0 P m H u 21.3 P m V in the 32.0 P m H u 32.0 P m V pixel. In the pixel , the floating diffusion (FD) and the transfer -gate -electrode (TG) are place d at the bottom center of the PD . The n -layer for the PD consists of the semicircular regions centered on the FD and the sector -shaped portions extending from the edge s of the semicircular regions. To generate an electric field greater than the average of 400 V/cm toward the FD direction in the entire PD region, the n -layer width of the sector -shaped portions becomes narrower from the proximal -end to the distal -end. By using the PD structure, which include s the above mentioned n-layer shape and the PD dopant profile with the condition of three times n -type dopant imp lantation , w e achiev ed to collect 96 % of the charges generated in the PD at the FD withi n 10 nsec . An ult ra-high speed CMOS image sensor with the abovementioned pixel structure has been fabricated. Through t he experiments, we confirmed t hree key characteristics as follows; the image lag was below the measurement limit , the electron transit time in the PD was less than 10 nsec , and the entire PD region had equivalent sensitivit y. Keywords: burst CMOS image sensor , ultra -high speed , pixel structure, fully charge transfer

Pixel Structure with 10 nsec Fully Charge Transfer Time for the 20M Frame Per Second Burst CMOS Image Sensor

In this paper, the non-ideal factors, which include spatial noise and temporal noise, are analyzed and suppressed in the high-speed spike-based image sensor, which combines the high-speed scanning sequential format with the method that uses the interspike time interval to indicate the scene information. In this imager, spatial noise contains device mismatch, which results in photo response non-uniformity (PRNU) and the non-uniformity of dark current. By multiplying the measured coefficient matrix the photo response non-uniformity is suppressed, and the non-uniformity of dark current is suppressed by correcting the interspike time interval based on the time interval of dark current. The temporal noise is composed of the shot noise and thermal noise. This kind of noise can be eliminated when using the spike frequency to restore the image. The experimental results show that, based on the spike frequency method, the standard deviation of the image decreases from 18.4792 to 0.5683 in the uniform bright light by using the calibration algorithm. While in the relatively uniform dark condition, the standard deviation decreases from 1.5812 to 0.4516. Based on interspike time interval method, because of time mismatch and temporal noise, the standard deviation of the image changes from 27.4252 to 27.4977 in the uniform bright light by using the calibration algorithm. While in the uniform dark condition, the standard deviation decreases from 2.361 to 0.3678.

The Analysis and Suppressing of Non-Uniformity in a High-Speed Spike-Based Image Sensor.

We developed a 312-kpixel back-side-illuminated ultrahigh-speed charge-coupled device (CCD) that has a sensitivity of 252 V/lux · s and is capable of operating at 16.7 Mfps. The potential profile of the pixel was designed by using a 3-D semiconductor device simulator. The high sensitivity results from the unit having fill factor and time aperture ratios of 100% and a high optical utilization ratio. Its sensitivity is 12.7 times that of a front-side-illuminated image sensor. Ultrahigh-speed shooting was enabled by an in situ storage image sensor. By reducing the wiring resistance and dividing the image area into eight blocks, a maximum frame rate of 16.7 Mfps was attained. The total pixel count is 760 horizontally and 411 vertically. The burst capturing speed is thus 5.2 Tpixel/s, making it the fastest imaging device to date.

A 252- ${\rm V/lux}{\cdot}{\rm s}$ , 16.7-Million-Frames-Per-Second 312-kpixel Back-Side-Illuminated Ultrahigh-Speed Charge-Coupled Device

A high-speed digital streak camera designed for simultaneous high-resolution color photography and focusing schlieren imaging is described The camera uses a computer-controlled galvanometer scanner to achieve synchroballistic imaging through a narrow slit Full color 20 megapixel images of a rocket sled moving at 480  m/s and of projectiles fired at around 400  m/s were captured, with high-resolution schlieren imaging in the latter cases, using conventional photographic flash illumination The streak camera can achieve a line rate for streak imaging of up to 24  million lines/s 

Digital synchroballistic schlieren camera for high-speed photography of bullets and rocket sleds

In 2002, we reported a CCD image sensor with 260×312 pixels capable of capturing 103 consecutive images at 1,000,000 frames per second (1Mfps) [1]. We named the sensor “ISIS-V2”, for In-situStorage Image Sensor Version 2. 103 memory elements are attached to every pixel; generated image signals were instantly and continuously stored in the in-situstorage without being read out of the sensor. The ultimate high-speed recording was enabled by this parallel recording at all pixels. In 2006, the color version, ISIS-V4, was reported [2]. In 2009, we developed ISIS-V12, a backside-illuminated image sensor mounting the ISIS structure and the CCM, charge-carrier multiplication, on the front side [3]. The CCM is a CCD-specific efficient signal-amplification device. CCM, combined with the BSI structure and cooling, achieved very high sensitivity. The ISIS-V12 was a test sensor intended to prove the technical feasibility of the structure. The maximum frame rate was 250kfps for a charge-handling capacity of Q max =10,000e− and 1Mfps for a reduced Q max . The pixel count was 489×400 pixels. For backside-illuminated (BSI) image sensors, metal wires can be placed on the front surface to increase the frame rate without reducing fill factor or violating uniformity of the pixel configuration. It has been proved by simulations that 100Mfps is achievable by introducing innovative technologies including a special wiring method [4]. We now report on ISIS-V16, developed by incorporating technologies to increase the frame rate with those to achieve very high sensitivity, which was confirmed by evaluation of ISIS-V12. The performance specification of ISIS-V16 is summarized in Fig. 23.4.1.

A 16 Mfps 165kpixel backside-illuminated CCD

23.4 A 16 Mfps 165kpixel Backside-Illuminated CCD

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A 16 Mfps 165kpixel backside-illuminated CCD

23.4 A 16 Mfps 165kpixel Backside-Illuminated CCD