A Review of Low‐Temperature Solution‐Processed Metal Oxide Thin‐Film Transistors for Flexible Electronics

Emulating the essential synaptic behaviors using single synaptic transistor has attracted extensive attention for building the brain-inspired neuromorphic systems. However, few reports on synaptic ...

Solution-Processed, Electrolyte-Gated In2O3 Flexible Synaptic Transistors for Brain-Inspired Neuromorphic Applications.

Two-dimensional semiconductors represent one of the best candidates to extend Moore's law for their superiorities, such as keeping high carrier mobility and remarkable gate-control capability at atomic thickness. Complementary transistors and van der Waals junctions are critical in realizing 2D semiconductors-based integrated circuits suitable for future electronics. N-type 2D semiconductors have been reported predominantly for the strong electron doping caused by interfacial charge impurities and internal structural defects. By contrast, superior and reliable p-type 2D semiconductors with holes as majority carriers are still scarce. Not only that, but some critical issues have not been adequately addressed, including their controlled synthesis in wafer size and high quality, defect and carrier modulation, optimization of interface and contact, and application in high-speed and low-power integrated devices. Here we review the material toolkit, synthesis strategies, device basics, and digital electronics closely related to p-type 2D semiconductors. We also discuss their opportunities, challenges, and prospects for future electronic applications, which would be promising or even shining in the post-Moore era. This article is protected by copyright. All rights reserved.

P-Type 2D Semiconductors for Future Electronics.

DOI: 10.1002/aelm.201800707 layers have also been demonstrated with impressive characteristics in next-generation electronics,[9–11] biological/chemical sensors,[15–17] and photoelectrical detectors,[18,19] etc. Even though the In2O3 material may not be the best material choice for the future sustainability because of the scarcity of In, it still attracts a great deal of attention due to its excellent electrical properties.[20–22] For instance, Kim et al. demonstrated a solution-processed metaloxide thin film transistors (e.g., In2O3, IZO, ZnO) via combustion process at a temperature as low as ≈200 °C, which yielded a high mobility of 13 cm2 V−1 s−1.[20] Meng et al. fabricated a electrospun fiberto-film processed metal-oxide thin film transistors (i.e., In2O3, IZO, IZrZO) with Al2O3 dielectrics, where these devices displayed an impressive on/off current ratio of 107 and a field effect mobility of 25 cm2 V−1 s−1.[21] The physical properties of In2O3 NFs could also be enhanced via crosslinking welding process developed by Cui et al.[22] However, until now, most of the 1D In2O3-based devices are generally operated in the n-type depletion-mode (D-mode), particularly featured with a negative threshold voltage (VTH), a high off-state current, and a low ratio of on-state/off-state current (Ion/Ioff). This inadequate device performance can be predominantly attributed to the excess carriers existed in the In2O3 NFs or nanowires (NWs), which are typically originated from the oxygen vacancies acting as the donor-like defects. Notably, the large negative VTH means that there is a non-zero channel current yielded at a zero gate Although In2O3 nanofibers (NFs) are considered as one of the fundamental building blocks for future electronics, the further development of these NFs devices is still seriously hindered by the large leakage current, low on/off current ratio (Ion/Ioff ), and large negative threshold voltage (VTH) due to the excess carriers existed in the NFs. A simple one-step electrospinning process is employed here to effectively control the carrier concentration of In2O3 NFs by selectively doping strontium (Sr) element to improve their electrical device performance. The optimal devices (3.6 mol% Sr doping concentration) can yield the high field-effect mobility (μfe ≈ 3.67 cm2 V−1 s−1), superior Ion/Ioff ratio (≈108), and operation in the energy-efficient enhancement-mode. High-κ Al2O3 thin films can also be employed as the gate dielectric to give the gate voltage greatly reduced by 10× (from 40 to 4 V) and the μfe substantially increased by 4.8× (to 17.2 cm2 V−1 s−1). The electrospun E-mode Sr-In2O3 NF field-effect transistors (NFFETs) can as well be integrated into full swing of inverters with excellent performances, further elucidating the significant advance of this electrospinning technique toward practical applications for future low-cost, energy-efficient, large-scale, and high-performance electronics.

Modulating Electrical Performances of In2O3 Nanofiber Channel Thin Film Transistors via Sr Doping

Recently, copper iodide (CuI) has been considered as a promising inorganic p-type semiconductor material Although significant progress using CuI has been made in materials and device applications for solar cells and thin-film transistors (TFTs), little consideration has been given to the vacancy formation mechanisms and their effect on the device performance In this work, high performance electrolyte-gated TFTs were fabricated using CuI semiconductors with different vacancy states and the origin of the threshold voltage (Vth) shift of devices in terms of vacancy species and concentration were studied The CuI films were fabricated via a simple solution process followed by thermal annealing at low temperature (55 °C) The vacancy species and concentration in the CuI semiconductor were regulated by changing the annealing conditions as well as by introducing a dopant material Photoluminescence (PL) and X-ray photoelectron spectroscopy (XPS) analysis were conducted to demonstrate the correlation between the electrical properties of TFTs and the vacancy states in the CuI specimens The CuI-TFTs exhibited typical enhancement mode operation of the p-channel transistor, with sub-1 V operation voltage, ON/OFF ratio of ∼103, and high hole mobility in the range of 10–60 cm2 V−1 s−1 Experimental results revealed that Cu vacancy (VCu) play the role of inducing hole carriers, hence, TFT with VCu-rich CuI exhibited increased carrier concentration and positively shifted Vth of 014 V However, iodine vacancy (VI) in CuI captures hole carriers, decreasing the concentration of charge carriers (holes), resulting to a negative Vth of −019 V The TFT mobility was also affected by the vacancy concentration, owing to the carrier scattering effect For instance, the I-rich (or VCu-rich) CuI exhibited decreased TFT mobility (1470 cm2 V−1 s−1) due to the high carrier concentration (1019 cm−3) and their scattering effect

Vacancy engineering of a solution processed CuI semiconductor: tuning the electrical properties of inorganic P-channel thin-film transistors

Recently, p-type metal–oxide–semiconductors have attracted considerable interests for the applications in optoelectronic devices and low-power complementary metal–oxide–semiconductor circuits. In this report, ternary p-type CuAlxOy semiconductor thin films were fabricated by sol–gel method and integrated as channel layers in thin-film transistors (TFTs). The electrical performances of CuAlxOy TFTs, together with the characteristics of CuAlxOy thin films (e.g., crystalline phases, chemical compositions, surface morphology, and optical transmittances), were systematically studied at various annealing temperatures ( ${T}_{a}$ ). The phase-pure CuAlO2 thin films were obtained at ${T}_{a}$ above 800° C in N2 atmosphere. CuAlO2 TFTs annealed at 900 ° C based on high-k Al2O3 exhibited optimized electrical performance, including a hole mobility of 1.36 cm2/Vs and on/off current ratio of $\sim 1 \times 10^{\textsf {5}}$ . This paper not only demonstrates the successful fabrication of high-quality p-type CuAlO2 semiconductor thin film and electronic devices by sol–gel process but also provides guidelines for related ternary p-type oxide semiconductor material and device performance improvements.

Sol–Gel Processed p-Type CuAlO 2 Semiconductor Thin Films and the Integration in Transistors

Recently, metal oxide nanofibers fabricated by electrospinning have been considered as promising components for next-generation electronic devices Unfortunately, the nanofiber-based electronic devices usually exhibited inferior electrical performance, due to the high contact resistance between the nanofibers and the inferior interfacial adhesion between the nanofibers and the substrate In this report, an amine-hardened epoxy resin was selected as an adhesion agent to weld nanofiber junctions and improve the interfacial adhesion performance It was confirmed that the physical properties of the nanofibers were greatly improved after the crosslinking welding process Taking advantage of the welding process, field-effect transistors (FETs) based on In2O3 nanofiber networks (NFNs) with various nanofiber densities were integrated and investigated It was found that the FETs based on In2O3 NFNs with a nanofiber density of 04 μm−1 exhibited the optimal electrical performance When high-k ZrOx was integrated into the FETs as the dielectric layer, the FETs based on In2O3 NFNs/ZrOx exhibited superior performance, including a μFE of 132 cm2 V−1 s−1, an Ion/Ioff of 107, and an SS of 90 mV per decade The crosslinking welding process is a simple, versatile and low-cost technique, which has great possibility for various applications

High performance electronic devices based on nanofibers via a crosslinking welding process.

https://iopscience.iop.org/article/10.1088/1361-6463/ab47b2/pdf

The role of oxygen in determining the electrical performance of ZnSnO nanofiber field-effect transistors

H doping can enhance the performance of ZnO thin-film transistors (TFTs) to a certain extent, and the design of double active layers is an effective way to further improve a device’s performance. However, there are few studies on the combination of these two strategies. We fabricated TFTs with ZnO:H (4 nm)/ZnO (20 nm) double active layers by magnetron sputtering at room temperature, and studied the effect of the hydrogen flow ratio on the devices’ performance. ZnO:H/ZnO-TFT has the best overall performance when H2/(Ar + H2) = 0.13% with a mobility of 12.10 cm2/Vs, an on/off current ratio of 2.32 × 107, a subthreshold swing of 0.67 V/Dec, and a threshold voltage of 1.68 V, which is significantly better than the performance of single active layer ZnO:H-TFTs. This exhibits that the transport mechanism of carriers in double active layer devices is more complicated. On one hand, increasing the hydrogen flow ratio can more effectively suppress the oxygen-related defect states, thus reducing the carrier scattering and increasing the carrier concentration. On the other hand, the energy band analysis shows that electrons accumulate at the interface of the ZnO layer close to the ZnO:H layer, providing an additional path for carrier transport. Our research exhibits that the combination of a simple hydrogen doping process and double active layer construction can achieve the fabrication of high-performance ZnO-based TFTs, and that the whole room temperature process also provides important reference value for the subsequent development of flexible devices.

/pdf/high-performance-thin-film-transistors-with-zno-h-zno-double-3tlyyyme.pdf

High-Performance Thin-Film Transistors with ZnO:H/ZnO Double Active Layers Fabricated at Room Temperature

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Sol–Gel Processed p-Type CuAlO 2 Semiconductor Thin Films and the Integration in Transistors

High performance electronic devices based on nanofibers via a crosslinking welding process.

The role of oxygen in determining the electrical performance of ZnSnO nanofiber field-effect transistors

High-Performance Thin-Film Transistors with ZnO:H/ZnO Double Active Layers Fabricated at Room Temperature