Chiyui Ahn
Stanford University
23 Papers
71 Citations
Chiyui Ahn is an academic researcher from Stanford University. The author has contributed to research in topics: Field-effect transistor & Carbon nanotube field-effect transistor. The author has an hindex of 10, co-authored 23 publications. Previous affiliations of Chiyui Ahn include Information and Communications University & Korea Institute of Science and Technology.
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Papers
Selective metal deposition at graphene line defects by atomic layer deposition
Kwanpyo Kim,Kwanpyo Kim,Han-Bo-Ram Lee,Han-Bo-Ram Lee,Richard W. Johnson,Jukka T. Tanskanen,Jukka T. Tanskanen,Nan Liu,Myung-Gil Kim,Myung-Gil Kim,Changhyun Pang,Changhyun Pang,Chiyui Ahn,Stacey F. Bent,Zhenan Bao +14 more
TL;DR: The selective functionalization of graphene defect sites, together with the nanowire morphology of deposited Pt, yields a superior platform for sensing applications and high-performance hydrogen gas sensors at room temperature are demonstrated.
Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier
Chiyui Ahn,Scott W. Fong,Yong-Sung Kim,Seunghyun Lee,Aditya Sood,Christopher M. Neumann,Mehdi Asheghi,Kenneth E. Goodson,Eric Pop,H.-S. Philip Wong +9 more
TL;DR: Graphene-PCM devices have ∼40% lower RESET current compared to control devices without the graphene, and the graphene could further enhance the PCM endurance by limiting atomic migration or material segregation at the bottom electrode interface.
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Vertical and Lateral Copper Transport through Graphene Layers.
Ling Li,Xiangyu Chen,Ching-Hua Wang,Ji Cao,Seunghyun Lee,Alvin Tang,Chiyui Ahn,Susmit Singha Roy,Michael S. Arnold,H.-S. Philip Wong +9 more
TL;DR: It is more effective to further enhance graphene barrier reliability by improving single-layer graphene quality through increasing grain sizes or using single-crystalline graphene than just by increasing thickness through multi-transfer.
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1D Selection Device Using Carbon Nanotube FETs for High-Density Cross-Point Memory Arrays
Chiyui Ahn,Zizhen Jiang,Chi-Shuen Lee,Hong-Yu Chen,Jiale Liang,Luckshitha Suriyasena Liyanage,H.-S. Philip Wong +6 more
TL;DR: In this paper, a one-transistor-n-resistors (1TnR) array architecture is proposed as a cost-effective solution to the sneak path problem in large-scale cross-point memory arrays.
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Temperature-dependent studies of the electrical properties and the conduction mechanism of HfOx-based RRAM
Chiyui Ahn,Seyoung Kim,Tayfun Gokmen,Oliver Dial,Mark B. Ritter,H.-S. Philip Wong +5 more
- 28 Apr 2014
TL;DR: In this article, the authors investigated the conduction mechanism of HfOx-based RRAM devices at different temperatures ranging from 350 K down to 40 K. They found that the electrical conduction of RRAM is strongly dependent on the resistance state of the device, electric field, and temperature.
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