Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spontaneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high-voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench-structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics.

https://hal.archives-ouvertes.fr/hal-03421528/document

GaN-based power devices: Physics, reliability, and perspectives

This letter reports a GaN vertical fin power field-effect-transistor structure with submicron fin-shaped channels on bulk GaN substrates. In this vertical transistor design only n-GaN layers are needed, while no material regrowth or p-GaN layer is required. A combined dry/wet etch was used to get smooth fin vertical sidewalls. The fabricated transistor demonstrated a threshold voltage of 1 V and specific on resistance of 0.36 ${\mathrm {m}}\Omega {\mathrm {cm}}^{2}$ . By proper electric field engineering, 800 V blocking voltage was achieved at a gate bias of 0 V.

High-Performance GaN Vertical Fin Power Transistors on Bulk GaN Substrates

Vertical gallium nitride (GaN) power devices have attracted increased attention due to their superior high-voltage and high-current capacity as well as easier thermal management than lateral GaN high electron mobility transistors. Vertical GaN devices are promising candidates for next-generation power electronics in electric vehicles, data centers, smart grids and renewable energy process. The use of low-cost foreign substrates such as silicon (Si) substrates, instead of the expensive free-standing GaN substrates, could greatly trim material cost and enable large-diameter wafer processing while maintaining high device performance. This review illustrates recent progress in material epitaxy, device design, device physics and processing technologies for the development of vertical GaN power devices on low-cost foreign substrates. Although the device technologies are still at the early stage of development, state-of-the-art vertical GaN-on-Si power diodes have already shown superior Baliga’s figure of merit than commercial SiC and Si power devices at the voltage classes beyond 600 V. Furthermore, we unveil the design space of vertical GaN power devices on native and different foreign substrates, from the analysis of the impact of dislocation and defects on device performance. We conclude by identifying the application space, current challenges and exciting research opportunities in this very dynamic research field.

https://iopscience.iop.org/article/10.1088/1361-6463/aac8aa/pdf

Gallium nitride vertical power devices on foreign substrates: a review and outlook

Recent years have witnessed GaN-based devices delivering their promise of unprecedented power and frequency levels and demonstrating their capability as an able replacement for Si-based devices. High-electron-mobility transistors (HEMTs), a key representative architecture of GaN-based devices, are well-suited for high-power and high frequency device applications, owing to highly desirable III-nitride physical properties. However, these devices are still hounded by issues not previously encountered in their more established Siand GaAs-based devices counterparts. Metal–insulator–semiconductor (MIS) structures are usually employed with varying degrees of success in sidestepping the major problematic issues such as excessive leakage current and current instability. While different insulator materials have been applied to GaN-based transistors, the properties of insulator/III-N interfaces are still not fully understood. This is mainly due to the difficulty of characterizing insulator/AlGaN interfaces in a MIS HEMT because of the two resulting interfaces: insulator/AlGaN and AlGaN/GaN, making the potential modulation rather complicated. Although there have been many reports of low interface-trap densities in HEMT MIS capacitors, several papers have incorrectly evaluated their capacitance–voltage (C–V) characteristics. A HEMT MIS structure typically shows a 2-step C–V behavior. However, several groups reported C–V curves without the characteristic step at the forward bias regime, which is likely to the high-density states at the insulator/ AlGaN interface impeding the potential control of the AlGaN surface by the gate bias. In this review paper, first we describe critical issues and problems including leakage current, current collapse and threshold voltage instability in AlGaN/GaN HEMTs. Then we present interface properties, focusing on interface states, of GaN MIS systems using oxides, nitrides and high-κ dielectrics. Next, the properties of a variety of AlGaN/GaN MIS structures as well as different characterization methods, including our own photo-assisted C–V technique, essential for understanding and developing successful surface passivation and interface control schemes, are given in the subsequent section. Finally we highlight the important progress in GaN MIS interfaces that have recently pushed the frontier of nitride-based device technology.

/pdf/insulated-gate-and-surface-passivation-structures-for-gan-16325xp5v2.pdf

Insulated gate and surface passivation structures for GaN-based power transistors

GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

Emerging GaN technologies for power, RF, digital, and quantum computing applications: Recent advances and prospects

In this letter, we report on high breakdown voltage in situ oxide, GaN interlayer-based vertical trench MOSFETs (OG-FETs) on bulk GaN substrates. Following our previous work on OG-FETs on GaN on sapphire, utilizing a low damage gate-trench etch and using bulk GaN substrates, a breakdown voltage of 990 V with an on-resistance 2.6 $\text{m}\Omega ~\cdot $ cm2, was achieved. Without edge termination, a high breakdown field of 1.6 MV/cm was achieved in these devices.

In Situ O xide, G aN Interlayer-Based Vertical Trench MOS FET ( OG-FET ) on Bulk GaN substrates

https://iopscience.iop.org/article/10.35848/1882-0786/abd06f/pdf

Demonstration of ultra-small ( 0.2%) for mini-displays

A normally off (V th = 4.7 V) vertical GaN OG-FET with a 10 nm UID-GaN channel interlayer and a 50 nm in-situ Al 2 O 3 gate dielectric has been successfully demonstrated and scaled for higher current operation. By using a novel double field-plated structure for mitigating peak electric field, a high off-state breakdown voltage over 1.4 kV was achieved with a low specific on-state resistance (RON, SP) of 2.2 mΩ.cm2. The MOCVD regrown 10 nm GaN channel interlayer enabled a channel resistance lower than 10 Qmm and an average channel electron mobility of 185 cm2/Vs. The fabricated large-area transistor with a total area of 400 μm × 500 μm offered a breakdown voltage of 900 V and an on-state resistance (R on ) of 4.1 Q. Results indicate the potential of vertical GaN OG-FETs for over kV range of power electronics applications.

Demonstrating >1.4 kV OG-FET performance with a novel double field-plated geometry and the successful scaling of large-area devices

In this letter, a novel device design to achieve both low ON-resistance and enhancement mode operation in a vertical GaN FET is demonstrated. In the traditional trench MOSFET structure, a dielectric is deposited on an n-p-n trenched structure and the channel forms via p-GaN inversion at the dielectric/p-GaN interface. However, this results in a relatively high ON-resistance due to poor electron mobility in the channel. By changing the structure to include a metal-organic chemical vapor deposition (MOCVD)-regrown Un-intentionally Doped (UID)-GaN interlayer followed by an in-situ dielectric (MOCVD Al2O3) cap on the n-p-n trenched structure, a pathway (channel) for enhanced electron mobility is created, resulting in reduced ON-resistance. Preliminary results for this device design demonstrated almost 60% reduction in the ON-resistance and similar breakdown voltage compared with a traditional trench MOSFET structure while maintaining normally off operation with a threshold voltage of 2 V.

OG-FET: An In-Situ ${O}$ xide, ${G}$ aN Interlayer-Based Vertical Trench MOSFET

We present a large-area in-situ oxide, GaN interlayer-based vertical trench MOSFET (OG-FET) with a metal organic chemical vapor deposition regrown 10-nm unintentional-doped-GaN interlayer as the channel and 50-nm in-situ Al2O3 as the gate dielectric. The threshold voltage of the device on bulk GaN substrate was 1 V measured at $\text{I}_\mathrm {on}/\text{I}_\mathrm {off}= 10^{7}$ . The OG-FET with an area scaled to 0.2 mm2 demonstrated a breakdown voltage ( $\text{V}_\mathrm {BR}$ ) of 320 V and an on-state resistance ( $\text{R}_\mathrm {on}$ ) of $3.8~\Omega $ (specific on-state resistance: $\text{R}_\mathrm {on,sp}= 7.6\,\,\text{m}\Omega \,\,\cdot $ cm2). For the single unit cell OG-FET from the same sample, $\text{V}_\mathrm {BR}$ was as high as 700 V (measured at $\text{V}_\mathrm {GS}=-10$ V), corresponding to a breakdown electric field of 1.4 MV/cm and $\text{R}_\mathrm {on,sp}$ of 0.98 $\text{m}\Omega ~\cdot $ cm2. On our control sample, which was grown on sapphire substrate, a 1-A current was measured as well. These results show the potential of the OG-FET in power conversion applications.

Large-Area In-Situ Oxide, GaN Interlayer-Based Vertical Trench MOSFET (OG-FET)

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