Construction of a novel multilayer conductive interconnection for an integrated circuit having more than one conductive layer is disclosed comprising a lower barrier layer which may be in contact with an underlying silicon substrate and comprising a material selected from the class consisting of TiW and TiN; an intermediate layer of conductive metal such as an aluminum base metal; and an upper barrier layer which may be in contact with a second aluminum base metal layer and which is selected from the class consisting of TiW, TiN, MoSi x and TaSi where x equals 2 or more.

Multilayer interconnection for integrated circuit structure having two or more conductive metal layers

A semiconductor device comprises a silicon substrate, an insulating film in which a contact hole is formed, a metallic layer deposited on said silicon substrate through the contact hole, for forming an ohmic contact to the silicon substrate, a barrier layer deposited on the metallic layer, for preventing reaction and interdiffusion between copper and silicon, and a metallization film including at least copper deposited on the barrier layer.

Semiconductor device using copper metallization

A method is disclosed for fabricating a semiconductor device and especially for contacting a semiconductor device. A silicon substrate is provided which has a device region formed at the surface thereof and which is contacted with a silicide. An insulating layer overlies the substrate and has an opening therethrough which exposes a portion of that device region. Titanium nitride is deposited in a blanket layer overlying the silicide and the insulating layer. A leveling agent such as a spin-on glass is applied to the structure to substantially fill the opening. That leveling agent is then anisotropically etched to leave the leveling agent only in the opening. The leveling agent is used as an etch mask to remove the portion of titanium nitride which is located outside the opening. After removing the remaining leveling agent, the titanium nitride in the opening is used as a nucleating surface for the selective deposition of a tungsten plug which fills the contact opening. The titanium nitride layer serves as both a nucleating surface and as a barrier layer which separates the tungsten from the underlying silicon.

Method for making a w/tin contact

A method for manufacturing a semiconductor device of the invention comprises the steps of (a) forming a gate insulating film on a surface of a silicon substrate, and a gate electrode on said gate insulating film; (b) forming a self-aligned insulating film at least on a side wall of said gate electrode; (c) forming a self-aligned metal or metal silicide film on a region on which an insulating film is not formed, said region including a source region, a drain region and a diffusion interconnection region which is an extended part of at least one of said source region and said drain region, or prospective regions for said source, drain and diffusion interconnection regions; and (d) forming said source region, said drain region and said diffusion interconnected region which is the extended part of at least one of said source region and said drain region, by doping at least one time said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate any time after step (a).

Method for manufacturing a semiconductor device utilizing self-aligned silicide regions

A semiconductor device which includes either a single semiconductor chip bearing an integrated circuit (IC) or two or more electrically interconnected semiconductor chips, is disclosed. This device includes interconnects between device components (on the same chip and/or on different chips), at least one of which includes a region of superconducting material, e.g., a region of copper oxide superconductor having a Tc greater than about 77K. Significantly, to avoid undesirable interactions, at high processing temperatures, between the superconducting material and underlying, silicon-containing material (which, among other things, results in the superconducting material reverting to its non-superconducting state), the interconnect also includes a combination of material regions which prevents such interactions.

Semiconductor devices having superconducting interconnects

A metal contact system for an IGFET having shallow source and drain includes a refractory metal silicide layer forming low resistance ohmic contact to a silicon surface, a layer on the silicide layer of another refractory metal to serve as a barrier against diffusion of the interconnect metal, and a layer of interconnect metal over the diffusion barrier layer The refractory metal layers are deposited by sputtering platinum or platinel for the first layer and titanium-tungsten for the second layer In metal gate construction an additional layer of chromium is used as an etch resistant mask to protect the refractory metal layers from chemical attack when removing silicon nitride after it has been used initially as an oxidation mask and later as a sputtering mask

Refractory metal contacts for IGFETS

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Refractory metal contacts for IGFETS