Chen Haiyan
National University of Defense Technology
46 Papers
192 Citations
Chen Haiyan is an academic researcher from National University of Defense Technology. The author has contributed to research in topics: Vector processor & Vectorization (mathematics). The author has an hindex of 9, co-authored 44 publications.
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Papers
FT-Matrix: A Coordination-aware Architecture for Signal Processing
Shuming Chen,Yaohua Wang,Sheng Liu,Jianghua Wan,Chen Haiyan,Hengzhu Liu,Kai Zhang,Liu Xiangyuan,Xi Ning +8 more
TL;DR: The FT-Matrix architecture is proposed, which improves the coordination of traditional vector-SIMD architectures from three aspects: the cooperation between the scalar and SIMD unit is refined with the dynamic coupling execution scheme, the communication among SIMD lanes is enhanced with the matrix-style communication, and data sharing among vector memory banks is accomplished by the unaligned vector memory accessing scheme.
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High efficiency, high repetition rate, all-fiber picoseconds pulse MOPA source with 125 W output in 15 μm fiber core
TL;DR: In this article, a home-made (6 + 1 + 1 × 1 fiber combiner is used to couple the pump light and signal light into the gain double cladding fiber, which can be used as a pump source in the fields of optical parametric oscillator, laser frequency doubling and supercontinuum generation.
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Patent
Universal computing digital signal processor
Chen Shuming,Yang Xuejun,Wan Jianghua,Liu Zhong,Chen Haiyan,Guo Yang +5 more
- 09 Apr 2014
TL;DR: In this article, a universal computing digital signal processor (UCSP) is presented, which consists of a CPU core unit, a DSP core unit and a multi-layer interconnection structure, an in-chip share storage array, an off-chip memory interface, a second high-speed input and output interface, an inter-chip direct connection interface and an intercore synchronous device.
14
Patent
Matrix register file for supporting whole reading and writing operations of matrix
Chen Shuming,Chen Haiyan,Wan Jianghua,Liu Hengzhu,Jihua Chen,Sun Yongjie,Yueyue Chen,Peng Yuanxi +7 more
- 10 Aug 2011
TL;DR: In this paper, a matrix register file for supporting the whole reading and writing operations of a matrix is presented, which can realize the whole matrix operation by adopting a single-matrix instruction, thereby improving the code density and reducing the memory expense and system consumption.
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