The invention discloses a unit delay prediction method based on a neural network, comprising the following steps: S1, selecting characteristic quantities required by SPICE simulation and neural network training; 2, randomly selecting that characteristic value, adopting SPICE to simulate and measure the delay of the unit, and establishing a sample set of the delay of the unit; S3, dividing the unitdelay sample set obtained by SPICE simulation into training sample set and test sample set, training the neural network model by a training sample set, and verifying the accuracy of neural network bytesting sample set, comparing the error between the unit delay predicted by testing sample set and the unit delay measured by SPICE simulation, and optimizing repeatedly the neural network parametersto reduce the error. The neural network model is a prediction model of unit delay. The invention also discloses a cell delay sensitivity calculation method. The invention has the advantages of high precision, low modeling cost and fast prediction speed.

Unit delay prediction method and element delay sensitivity calculation method based on neural network

The invention relates to a method for predicting operating characteristics of an integrated circuit. The method includes the following steps: providing a plurality of units used by an integrated circuit design; with a test module, carrying out voltage frequency scanning testing on the units respectively to generate a plurality of parameters corresponding to voltage values; according to the plurality of parameters, establishing a lookup table; acquiring a corresponding time sequence analysis sign-off information on the integrated circuit design; and carrying out time sequence analysis on a plurality of time sequence paths of the integrated circuit to obtain key time sequence paths according to the time sequence analysis sign-off information and parameters in the look-up table and predictingoperation characteristics of the integrated circuit according to the key time sequence paths.

Method and device for predicting operating characteristics of integrated circuit

Disclosed by the present invention is a neural network-based cell delay prediction method, comprising the following steps: S1: selecting a characteristic quantity required for a SPICE simulation and neural network training; S2: randomly selecting a characteristic quantity value, measuring cell delay by using the SPICE simulation, and establishing a cell delay sample set; S3: dividing the cell delay sample set obtained by the SPICE simulation into a training sample set and a test sample set, training a neural network model by using the training sample set, verifying neural network precision by using the test sample set, comparing an error between cell delay predicted by the test sample set and the cell delay measured by the SPICE simulation, and repetitively optimizing and adjusting neural network parameters to reduce the error, wherein the neural network model is a prediction model for cell delay. Further disclosed by the present invention is a cell delay sensitivity calculation method. The precision of the present invention is high, modeling overhead is low and prediction speed is fast.

Neural network-based cell delay prediction method and cell delay sensitivity calculation method

The invention provides a method for acquiring timing sequence parameters through machine learning. The method includes the following steps that parameters of unit circuits serve as attributes, and a machine learning model is established; a timing sequence parameter table in an existing timing sequence library serves as a training sample to be introduced into sample space of the machine learning model; an SPICE simulation result is extracted to serve as a training sample to be introduced into the sample space of the machine learning model; the attributes of the unit circuits serve as input, needed parameters are acquired from the machine learning model, and the parameters are instantly back-marked in the circuits for STA analysis. The method is innovated in that the method for acquiring thetiming sequence parameters through machine learning rapidly and accurately provides the timing sequence parameters needed for STA analysis for all units in the circuits, the process of timing sequence verification is accelerated, it is not needed to repeatedly run SPICE simulation, the real unit circuit timing sequence parameters can be generated through the machine learning model, and thereforethe iteration process of STA verification is accelerated.

Method for acquiring timing sequence parameters through machine learning

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Method for acquiring timing sequence parameters through machine learning