Guided by brain-like ‘spiking’ computational frameworks, neuromorphic computing—brain-inspired computing for machine intelligence—promises to realize artificial intelligence while reducing the energy requirements of computing platforms. This interdisciplinary field began with the implementation of silicon circuits for biological neural routines, but has evolved to encompass the hardware implementation of algorithms with spike-based encoding and event-driven representations. Here we provide an overview of the developments in neuromorphic computing for both algorithms and hardware and highlight the fundamentals of learning and hardware frameworks. We discuss the main challenges and the future prospects of neuromorphic computing, with emphasis on algorithm–hardware codesign. The authors review the advantages and future prospects of neuromorphic computing, a multidisciplinary engineering concept for energy-efficient artificial intelligence with brain-inspired functionality.

Towards spike-based machine intelligence with neuromorphic computing.

Event cameras are bio-inspired sensors that differ from conventional frame cameras: Instead of capturing images at a fixed rate, they asynchronously measure per-pixel brightness changes, and output a stream of events that encode the time, location and sign of the brightness changes. Event cameras offer attractive properties compared to traditional cameras: high temporal resolution (in the order of is), very high dynamic range (140dB vs. 60dB), low power consumption, and high pixel bandwidth (on the order of kHz) resulting in reduced motion blur. Hence, event cameras have a large potential for robotics and computer vision in challenging scenarios for traditional cameras, such as low-latency, high speed, and high dynamic range. However, novel methods are required to process the unconventional output of these sensors in order to unlock their potential. This paper provides a comprehensive overview of the emerging field of event-based vision, with a focus on the applications and the algorithms developed to unlock the outstanding properties of event cameras. We present event cameras from their working principle, the actual sensors that are available and the tasks that they have been used for, from low-level vision (feature detection and tracking, optic flow, etc.) to high-level vision (reconstruction, segmentation, recognition). We also discuss the techniques developed to process events, including learning-based techniques, as well as specialized processors for these novel sensors, such as spiking neural networks. Additionally, we highlight the challenges that remain to be tackled and the opportunities that lie ahead in the search for a more efficient, bio-inspired way for machines to perceive and interact with the world.

pdf/event-based-vision-a-survey-2pbof38y40.pdf

Event-based Vision: A Survey

Review on spintronics: Principles and device applications

Research in photonic computing has flourished due to the proliferation of optoelectronic components on photonic integration platforms. Photonic integrated circuits have enabled ultrafast artificial neural networks, providing a framework for a new class of information processing machines. Algorithms running on such hardware have the potential to address the growing demand for machine learning and artificial intelligence in areas such as medical diagnosis, telecommunications, and high-performance and scientific computing. In parallel, the development of neuromorphic electronics has highlighted challenges in that domain, particularly related to processor latency. Neuromorphic photonics offers sub-nanosecond latencies, providing a complementary opportunity to extend the domain of artificial intelligence. Here, we review recent advances in integrated photonic neuromorphic systems, discuss current and future challenges, and outline the advances in science and technology needed to meet those challenges. Photonics offers an attractive platform for implementing neuromorphic computing due to its low latency, multiplexing capabilities and integrated on-chip technology.

Photonics for artificial intelligence and neuromorphic computing

There are two general approaches to developing artificial general intelligence (AGI)1: computer-science-oriented and neuroscience-oriented. Because of the fundamental differences in their formulations and coding schemes, these two approaches rely on distinct and incompatible platforms2–8, retarding the development of AGI. A general platform that could support the prevailing computer-science-based artificial neural networks as well as neuroscience-inspired models and algorithms is highly desirable. Here we present the Tianjic chip, which integrates the two approaches to provide a hybrid, synergistic platform. The Tianjic chip adopts a many-core architecture, reconfigurable building blocks and a streamlined dataflow with hybrid coding schemes, and can not only accommodate computer-science-based machine-learning algorithms, but also easily implement brain-inspired circuits and several coding schemes. Using just one chip, we demonstrate the simultaneous processing of versatile algorithms and models in an unmanned bicycle system, realizing real-time object detection, tracking, voice control, obstacle avoidance and balance control. Our study is expected to stimulate AGI development by paving the way to more generalized hardware platforms. The ‘Tianjic’ hybrid electronic chip combines neuroscience-oriented and computer-science-oriented approaches to artificial general intelligence, demonstrated by controlling an unmanned bicycle.

Towards artificial general intelligence with hybrid Tianjic chip architecture.

Loihi is a 60-mm2 chip fabricated in Intels 14-nm process that advances the state-of-the-art modeling of spiking neural networks in silicon. It integrates a wide range of novel features for the field, such as hierarchical connectivity, dendritic compartments, synaptic delays, and, most importantly, programmable synaptic learning rules. Running a spiking convolutional form of the Locally Competitive Algorithm, Loihi can solve LASSO optimization problems with over three orders of magnitude superior energy-delay-product compared to conventional solvers running on a CPU iso-process/voltage/area. This provides an unambiguous example of spike-based computation, outperforming all known conventional solutions.

Loihi: A Neuromorphic Manycore Processor with On-Chip Learning

Systems and methods for supervised learning and cascaded training of a neural network are described. In an example, a supervised process is used for strengthening connections to classifier neurons, with a supervised learning process of receiving a first spike at a classifier neuron from a processing neuron in response to training data, and receiving an out-of-band communication of a second desired (artificial) spike at the classifier neuron that corresponds to the classification of the training data. As a result of spike timing dependent plasticity, connections to the classifier neuron are strengthened. In another example, a cascaded technique is disclosed to generate a plurality of trained neural networks that are separately initialized and trained based on different types or forms of training data, which may be used with cascaded or parallel operation of the plurality of trained neural networks.

Supervised training and pattern matching techniques for neural networks

Techniques and mechanisms to facilitate a data classification functionality by communicating feedback signals with a spiked neural network. In an embodiment, input signaling, provided to the spiking neural network, results in one or more output spike trains which are indicative of that the input signaling corresponds to a particular data type. Based on the one or more output spike trains, feedback signals are variously communicated each to a respective node of the spiking neural network. The feedback signals variously control signal response characteristics of the nodes. Subsequent output signaling by the spiking neural network, in further response the input signaling, is improved based on the feedback control of nodes' signal responses. In another embodiment, the feedback signals are used to adjust synaptic weight values during training of the spiking neural network.

Feedback signaling to facilitate data classification functionality of a spiking neural network

Techniques and mechanisms to update a synaptic weight of a spiking neural network which is trained to provide a decision of a decision-making sequence. In an embodiment, a synapse of the spiking neural network is associated with a weight which is to be given to communications via that given synapse. The spiking neural network generates output signaling, indicating a decision to the decision-making process, which is evaluated to determine whether, according to predefined test criteria, the decision-making process is successful or unsuccessful. One or more nodes of the spiking neural network receive a reward/penalty signal which is based on the evaluation. In response to the reward/penalty signal indicating a reward event or a penalty event, a synaptic weight value is updated. In another embodiment, input signaling provided to the spiking neural network represents a sub-sequence of two or more most recent states in a sequence of states.

Reward-based updating of synpatic weights with a spiking neural network

Loihi is Intel’s novel, manycore neuromorphic processor and is the first of its kind to feature a microcode-programmable learning engine that enables on-chip training of spiking neural networks (SNNs). The authors present the Loihi toolchain, which consists of an intuitive Python-based API for specifying SNNs, a compiler and runtime for building and executing SNNs on Loihi, and several target platforms (Loihi silicon, FPGA, and functional simulator). To showcase the toolchain, the authors describe how to build, train, and use a SNN to classify handwritten digits from the MNIST database.

Programming Spiking Neural Networks on Intel’s Loihi

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