In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi

/pdf/a-77-ghz-phased-array-transceiver-with-on-chip-antennas-in-28o001tlk0.pdf

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Receiver and Antennas

A low-noise amplifier, direct-conversion quadrature mixer, power amplifier, and voltage-controlled oscillators have been implemented in a 012-/spl mu/m, 200-GHz f/sub T/290-GHz f/sub MAX/ SiGe bipolar technology for operation at 60 GHz At 615 GHz, the two-stage LNA achieves 45-dB NF, 15-dB gain, consuming 6 mA from 18 V This is the first known demonstration of a silicon LNA at V-band The downconverter consists of a preamplifier, I/Q double-balanced mixers, a frequency tripler, and a quadrature generator, and is again the first known demonstration of silicon active mixers at V-band At 60 GHz, the downconverter gain is 186 dB and the NF is 133 dB, and the circuit consumes 55 mA from 27 V, while the output buffers consume an additional 52 mA The balanced class-AB PA provides 108-dB gain, +112-dBm 1-dB compression point, 43% maximum PAE, and 16-dBm saturated output power Finally, fully differential Colpitts VCOs have been implemented at 22 and 67 GHz The 67-GHz VCO has a phase noise better than -98 dBc/Hz at 1-MHz offset, and provides a 31% tuning range for 8-mA current consumption from a 3-V supply

SiGe bipolar transceiver circuits operating at 60 GHz

Integration of mm-wave multiple-antenna systems on silicon-based processes enables complex, low-cost systems for high-frequency communication and sensing applications. In this paper, the transmitter and LO-path phase-shifting sections of the first fully integrated 77-GHz phased-array transceiver are presented. The SiGe transceiver utilizes a local LO-path phase-shifting architecture to achieve beam steering and includes four transmit and receive elements, along with the LO frequency generation and distribution circuitry. The local LO-path phase-shifting scheme enables a robust distribution network that scales well with increasing frequency and/or number of elements while providing high-resolution phase shifts. Each element of the heterodyne transmitter generates +12.5 dBm of output power at 77 GHz with a bandwidth of 2.5 GHz leading to a 4-element effective isotropic radiated power (EIRP) of 24.5 dBm. Each on-chip PA has a maximum saturated power of +17.5 dBm at 77 GHz. The phased-array performance is measured using an internal test option and achieves 12-dB peak-to-null ratio with two transmit and receive elements active

/pdf/a-77-ghz-phased-array-transceiver-with-on-chip-antennas-in-4jwlrsdlho.pdf

A 77-GHz Phased-Array Transceiver With On-Chip Antennas in Silicon: Transmitter and Local LO-Path Phase Shifting

"Extreme environments" represents an important niche market for electronics and spans the operation of electronic components in surroundings lying outside the domain of conventional commercial, or even military, specifications. Such extreme environments would include, for instance, operation to very low temperatures (e.g., to 77 K or even 4.2 K), operation at very high temperatures (e.g., to 200/spl deg/C or even 300/spl deg/C), and operation in a radiation-rich environment (e.g., space). We argue that the unique bandgap-engineered features of silicon-germanium heterojunction bipolar transistors offer great potential to simultaneously satisfy all three extreme environment applications, potentially with little or no process modification, ultimately providing compelling cost advantages at the IC and system level.

On the Potential of SiGe HBTs for Extreme Environment Electronics

This work reports on SiGe HBTs with f/sub T/ of 350 GHz. This is the highest reported f/sub T/ for any Si-based transistor as well as any bipolar transistor. Associated f/sub max/ is 170 GHz, and BV/sub CEO/ and BV/sub CBO/ are measured to be 1.4 V and 5.0 V, respectively. Also achieved was the simultaneous optimization of f/sub T/ and f/sub max/ resulting in 270 GHz and 260 GHz, with BV/sub CEO/ and BV/sub CBO/ of 1.6 V and 5.5 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub T/ and f/sub max/ values are also discussed.

SiGe HBTs with cut-off frequency of 350 GHz

This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f/sub T/) of 207 GHz and an f/sub MAX/ extrapolated from Mason's unilateral gain of 285 GHz. f/sub MAX/ extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12/spl times/2.5 /spl mu/m/sup 2/ have these characteristics at a linear current of 1.0 mA//spl mu/m (8.3 mA//spl mu/m/sup 2/). Smaller transistors (0.12/spl times/0.5 /spl mu/m/sup 2/) have an f/sub T/ of 180 GHz at 800 /spl mu/A current. The devices have a pinched base sheet resistance of 2.5 k/spl Omega//sq. and an open-base breakdown voltage BV/sub CEO/ of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f/sub T/ at small lateral dimensions.

Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

This letter reports on the room temperature operation of a conventional SiGe bipolar ECL ring oscillator with a minimum stage delay of 4.2 ps for /spl sim/250 mV single ended voltage swing. To our knowledge, this is the lowest reported delay for a gate fabricated using transistor devices. The circuit uses 0.12 /spl times/ 2 /spl mu/m/sup 2/ emitter size SiGe n-p-n transistors with a room temperature f/sub T/ of 207 GHz and f/sub MAX/ (unilateral gain extrapolation) of 285 GHz. The ring oscillator was studied as a function of various device and circuit parameters and it was found that minimum delay is more dependent on the parasitic resistance and capacitance in the n-p-n device than on pure transit time across the device.

A 4.2-ps ECL ring-oscillator in a 285-GHz f/sub MAX/ SiGe technology

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Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

A 4.2-ps ECL ring-oscillator in a 285-GHz f/sub MAX/ SiGe technology