Silicon-Germanium (SiGe) technology effectively merges the desirable attributes of conventional silicon-based CMOS manufacturing (high integration levels, at high yield and low cost) with the extreme levels of transistor performance attainable in classical III-V heterojunction bipolar transistors (HBTs). SiGe technology joins together on-die high-speed bandgap-engineered SiGe HBTs with conventional Si CMOS to form SiGe BiCMOS technology, including all the requisite RF passive elements and multi-level thick-Al metalization required for high-speed circuit design. Such an silicon-based integrated circuit technology platform presents designers with an ideal division of labor for realizing optimal solutions to many performance-constrained mixed-signal (analog + digital + RF) systems. The unique bandgap-engineered features of SiGe HBTs enable several key merits with respect to operation across a wide variety of so-called “extreme environments”, potentially with little or no process modification, ultimately providing compelling advantages at the circuit and system level, across a wide class of envisioned commercial and defense applications. Here we give an overview of this interesting field, focusing primarily on the intersection of SiGe HBTs, and circuits built from them, with radiation-intense environments such as space.

Radiation Effects in SiGe Technology

Several industrial applications require specific electronic systems installed in harsh environments to perform measurements, monitoring, and control tasks such as in space exploration, aerospace missions, automotive industries, down-hole oil and gas industry, and geothermal power plants. The extreme environment could be surrounding high-, low-, and wide-range temperature, intense radiation, or even a combination of above conditions. We review, in this paper, the main leading applications that demand advanced technologies to fit the unconventional requirements of extreme operating conditions, discussing their main merits and limits compared to established and emerging technologies in this field, including silicon (Si), silicon on insulator (SOI), silicon germanium (SiGe), silicon carbide (SiC) as well as III–V semiconductors particularly the gallium nitride (GaN) semiconductor. In spite of successfully exceeding extreme conditions borders by developing advanced semiconductor devices dedicated for harsh environments, especially in high-temperature applications, the packaging challenges are still limiting the reliability of the developed technologies. Those challenges are examined in this review in terms of limitations and proposed solutions.

Electronics and Packaging Intended for Emerging Harsh Environment Applications: A Review

Even the quantum simulation of simple molecules such as Fe$_2$S$_2$ requires more than 10$^6$ qubits. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it provides the capability of nanometric, serial and industrial quality fabrication. The maximum amount of quantum information per unit surface and the consequent space constraints on qubit operations are key parameters towards fault-tolerant quantum information processing (QIP) with Si qubits. Such maximum density of quantum information is expressed for the compact exchange-only Si double quantum dot qubit architecture as a function of the CMOS technology node. The size scale optimizing both physical qubit operation time and quantum error correction (QEC) requirements is assessed by reviewing the physical and technological constraints. We determine the workable operation frequency range of a Si-CMOS quantum processor to be within 1 and 100 GHz, which limits its feasibility only to the most advanced nodes. The compatibility with classical control circuitry is discussed, focusing on the cryogenic CMOS operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip. The operation time range prospected for cryogenic control electronics is found to be compatible with the qubit operation time. By combining the forecast of technology development with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm$^2$ for the 10-nm and 7-nm technology nodes respectively for the Steane code. The density is one and two orders of magnitude less for surface and concatenated codes respectively. Such values provide a benchmark for the development of Si-based fault tolerant QIP.

pdf/quantum-information-density-scaling-and-qubit-operation-time-36ke4r53he.pdf

Quantum information density scaling and qubit operation time constraints of CMOS silicon based quantum computer architectures

In the last decade, significant effort has been expended towards the development of reliable, high-temperature integrated circuits Designs based on a variety of active semiconductor devices including junction field effect transistors and metal-oxide-semiconductor field effect transistors have been pursued and demonstrated More recently1,2, advances in low-power complementary MOS devices have enabled the development of highly-integrated digital, analog and mixed-signal integrated circuits The results of elevated temperature testing (as high as 500°C) for extended periods (up to 100 hours) of several building block circuits will be presented These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at these extreme temperatures for any period of time Based on these results, Venus nominal temperature (470°C) SPICE m°dels and gate-level timing models were created using parasitic extracted simulations

High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

This paper presents an investigation of the impact of single-event transients (SETs) and total ionization dose (TID) on precision voltage reference circuits designed in a fourth-generation, 90-nm SiGe BiCMOS technology. A first-order uncompensated bandgap reference (BGR) circuit is used to benchmark the SET and TID responses of these voltage reference circuits (VRCs). Based on the first-order BGR radiation response, new circuit-level radiation-hardening-by-design (RHBD) techniques are proposed. An RHBD technique using inverse-mode (IM) transistors is demonstrated in a BGR circuit. In addition, a PIN diode VRC is presented as a potential SET and TID tolerant, circuit-level RHBD alternative.

Single-Event Transient and Total Dose Response of Precision Voltage Reference Circuits Designed in a 90-nm SiGe BiCMOS Technology

We have presented the architecture, simulation, packaging, and over-temperature and radiation testing of a complex, 16-channel, extreme environment capable, SiGe Remote Electronics Unit containing the Remote Sensor Interface ASIC that can serve a wide variety of space-relevant needs as designed. These include future missions to the Moon and Mars, with the additional potential to operate in other hostile environments, including lunar craters and around the Jovian moon, Europa. We have expanded on the previous introduction of the RSI to show the validity of the chip design and performance over an almost 250 K temperature range, down to 100 K, under 100 krad TID radiation exposure, with SEL immunity and operability in a high-flux SET environment.

A new approach to designing electronic systems for operation in extreme environments: Part II - The SiGe remote electronics unit

We have described the modeling, circuit design, system integration, and measurement of a Remote Sensor Interface (Figure 20) that took place over a span of 5 years and 8 fabrication cycles. It was conceived as part of the Multi-Chip Module (MCM) shown in Figure 21, which also includes a digital control chip for clocking, programming, and read-out. Further work beyond the scope of this was performed to validate the RSI for the extreme environmental conditions of a lunar mission, and individual blocks are presently.

/pdf/a-new-approach-to-designing-electronic-systems-for-operation-37tf8f0ira.pdf

A new approach to designing electronic systems for operation in extreme environments: Part I - The SiGe Remote Sensor Interface

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A new approach to designing electronic systems for operation in extreme environments: Part II - The SiGe remote electronics unit

A new approach to designing electronic systems for operation in extreme environments: Part I - The SiGe Remote Sensor Interface