Brian L. Corrie
Tektronix
14 Papers
108 Citations
Brian L. Corrie is an academic researcher from Tektronix. The author has contributed to research in topics: Die (integrated circuit) & Integrated circuit. The author has an hindex of 6, co-authored 14 publications.
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Papers
Large format, high resolution image sensors
Morley M. Blouke,Brian L. Corrie,Denis L. Heidtmann,Fanling H. Yang,M. Winzenread,M. L. Lust,Harry H. Marsh,James R. Janesick +7 more
TL;DR: In this article, the performance requirements for scientific-quality CCDs are discussed, focusing on the design of two devices, and the progress toward achieving the desired performance is discussed.
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Large area CCD image sensors for scientific applications
Morley M. Blouke,Denis L. Heidtmann,Brian L. Corrie,M. L. Lust,James R. Janesick +4 more
- 11 Dec 1985
TL;DR: In this paper, the designs of the 512 x 512 pixel and 2048 x 2048 pixel CCD sensors developed for scientific imaging are described, which are manufactured using the three phase, three level polysilicon gate technology.
27
Patent
Method of thinning a silicon wafer using a reinforcing material
Brian L. Corrie
- 27 Dec 1988
TL;DR: In this article, a plate-like body at least about 0.5 mm thick that is to be thinned is reinforced by applying to one main surface, in adhesive relationship thereto, a coating of a finely divided material which is fused to form a hard mechanically supportive coating.
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Patent
Method of treating an integrated circuit
Brian L. Corrie,Morley M. Blouke,Denis L. Heidtmann +2 more
- 29 Oct 1987
TL;DR: An integrated circuit formed in a semiconductor die which has at least two distinct functional regions is treated by mounting the die by way of its front face on a support member, and subsequently removing die material by means of its back face so as to physically separate the functional regions of the die from each other as mentioned in this paper.
9
Patent
Method of treating an integrated circuit to provide a temperature sensor that is integral therewith
Morley M. Blouke,Brian L. Corrie +1 more
- 19 Jul 1988
TL;DR: In this article, an integrated circuit is formed in a semiconductor die having a front face and a back face, the die having at least first and second functional regions, the first functional region comprises at least one zone of p-type material and the second functional region is composed of n-type materials in a p-n junction.
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