Design aspects of a distributed MIMD processor

The computer handbook

Curve generation of implicit functions by incremental computers

This correspondence examines the sources of limit cycle oscillations in Digital Incremental Computers and proposes several different methods for their suppression. A theoretical analysis is performed based on considering the effects of noise injected at the truncation points of the system and the results are verified by extensive simulation.

Suppressing limit cycles in digital incremental computers

This article describes a new generalized integrator with an improved performance. It has a partially digital architecture. For high speed operation, digital information is processed at incremental intervals rather than at sample by sample instants. This feature is implemented without precluding neither the direct interfacing of the unit to the analogue computer nor the provision of an economical computing unit. The proposed structure has been simulated, constructed and applied to solve some problems with accurate results.

Incremental generalized integrator

The article describes a variable high-speed incremental computer that adopts the basic concept underlying a digital differential analyzer (DDA). Its structure closely resembles that of a microprocessor and includes the following features: floating-point arithmetic, a word-length transfer with the elimination of a residue (R) register, multibit multiplication, and a flexible software scheme of interconnections that includes the use of a stack to avoid redundant operations. The proposed structure has been simulated by solving a variety of differential equations with distinctly accurate results.

An Incremental Computer

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An Incremental Computer