In linear IC's fabricated in a low-voltage CMOS technology, the reduction of the dynamic range due to the dc offset and low frequency noise of the amplifiers becomes increasingly significant. Also, the achievable amplifier gain is often quite low in such a technology, since cascoding may not be a practical circuit option due to the resulting reduction of the output signal swing. In this paper, some old and some new circuit techniques are described for the compensation of the amplifier's most important nonideal effects including the noise (mainly thermal and 1/f noise), the input-referred dc offset voltage as well as the finite gain resulting in a nonideal virtual ground at the input.

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

The historical and technological development of the ubiquitous trench power MOSFET (or vertical trench VDMOS) is described. Overcoming the deficiencies of VMOS and planar VDMOS, trench VDMOS innovations include pioneering efforts in reactive ion etching and oxidation of the silicon trench gate, polysilicon fill and recessed etchback, unit cell and distributed voltage clamping to protect the trench gate, and scaling active cells to high densities using deep submicron fabrication. Thereafter, gate–drain engineered trench VDMOS improved high-frequency switching capability with lower gate charge utilizing nonuniform gate oxides, field shaping, and charge balancing (superjunction, RSO) methods. The recent adaptation of trench gates in wide bandgap unipolar devices is also described.

The Trench Power MOSFET: Part I—History, Technology, and Prospects

High-frequency (HF) modeling of MOSFETs for radio-frequency (RF) integrated circuit (IC) design is discussed Modeling of the intrinsic device and the extrinsic components is discussed by accounting for important physical effects at both dc and HF The concepts of equivalent circuits representing both intrinsic and extrinsic components in a MOSFET are analyzed to obtain a physics-based RF model The procedures of the HF model parameter extraction are also developed A subcircuit RF model based on the discussed approaches can be developed with good model accuracy Further, noise modeling is discussed by analyzing the theoretical and experimental results in HF noise modeling Analytical calculation of the noise sources has been discussed to understand the noise characteristics, including induced gate noise The distortion behavior of MOSFET and modeling are also discussed The fact that a MOSFET has much higher "low-frequency limit" is useful for designers and modelers to validate the distortion of a MOSFET model for RF application An RF model could well predict the distortion behavior of MOSFETs if it can accurately describe both dc and ac small-signal characteristics with proper parameter extraction

MOSFET modeling for RF IC design

A simple and accurate parameter-extraction method of a high-frequency small-signal MOSFET model including the substrate-related parameters and nonreciprocal capacitors is proposed. Direct extraction of each parameter using a linear regression approach is performed by Y-parameter analysis on the proposed equivalent circuit of the MOSFET for high-frequency operation. The extracted results are physically meaningful and good agreement has been obtained between the simulation results of the equivalent circuit and measured data without any optimization. Also, the extracted parameters, such as g/sub m/ and g/sub ds/, match very well with those obtained by DC measurement.

A simple and analytical parameter-extraction method of a microwave MOSFET

The effects of device geometry, oxide thickness, and bias condition on the thermal noise of MOSFET's are investigated. The experimental results show that the conventional MOSFET thermal noise models do not accurately predict the thermal noise of MOSFET's. A model that is capable of predicting the thermal noise of both long and short channel devices in both the triode and saturation regions is presented. This model, which can be easily implemented into existing circuit simulators such as SPICE, has been verified by a wide variety of measurements. >

MOSFET thermal noise modeling for analog integrated circuits

MOSFET capacitor models implemented in circuit simulators currently do not guarantee charge conservation, which is extremely crucial for the simulation of dynamic RAM's, switched capacitor filters, and other MOS VLSI circuits. Several MOSFET capacitor models have been introduced in the literature; however, none of these models addresses the actual reasons of charge nonconservation in SPICE2. This charge conservation problem has been studied and the causes are found. Our investigations show that charge is the appropriate state variable, and that the nonconservation of charge in SPICE2 stems from a numerical integration problem quite independent of the device physics. A new charge model has been derived, implemented in SPICE2, and tested. The new model differs from the previous models in two respects. First, it uses both charge equations and capacitance equations. Second, the partitioning of the channel charge between the source and drain terminals is carried out by requiring the charge equations to satisfy self-consistent boundary conditions. A strong emphasis is placed on charge continuity, both in the conventional operating region and in the region of weak inversion and accumulation. Benchmark tests indicate that this new model conserves charge while reducing the simulation time by 18-85 percent compared to Meyer's model which was originally used in SPICE2.

An Investigation of the Charge Conservation Problem for MOSFET Circuit Simulation

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An Investigation of the Charge Conservation Problem for MOSFET Circuit Simulation