Armin Klumpp

TL;DR: In this article, the authors realized a three dimensional metallization for vertically integrated circuits (VIC) using a newly developed technology that allows stacking and vertical interchip wiring of completely processed and electrically tested wafers using available microelectronic processes.

TL;DR: 3D integration of multiple MEMS/IC stacks was successfully demonstrated for the fabrication of miniaturized sensor systems (e-CUBES), as for automotive, health & fitness and aeronautic applications.

TL;DR: The I_nterC_hip V_ia (ICV) as mentioned in this paper is a fully CMOS compatible wafer-scale process which provides vertical electrical interchip interconnects placed at arbitrary locations, without intervention to the IC's fabrication technologies.

TL;DR: In this paper, a low-cost fabrication approach for vertical system integration is introduced, which takes advantage of wafer level processing to avoid increasing package sizes and expensive single component assembling processes.