Anastasios N. Bikos
University of Patras
13 Papers
17 Citations
Anastasios N. Bikos is an academic researcher from University of Patras. The author has contributed to research in topics: Wireless network & Multiprotocol Label Switching. The author has an hindex of 3, co-authored 9 publications. Previous affiliations of Anastasios N. Bikos include University of Surrey & Research Academic Computer Technology Institute.
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Papers
LTE/SAE Security Issues on 4G Wireless Networks
Anastasios N. Bikos,Nicolas Sklavos +1 more
- 01 Mar 2013
TL;DR: The authors analyze several vulnerabilities in LTE/SAE security architecture, specifically, insecure AKA key derivation procedures and the lack of fast reauthentications during handovers.
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New unified PON-RAN access architecture for 4G LTE networks
TL;DR: This work presents a new converged access architecture for LTE mobile backhaul networks, where evolved NodeBs are interconnected with local ring-based wavelength-division-multiplexed (WDM) passive optical networks (PONs), which aggregate and efficiently transport traffic to the evolved packet core (EPC).
Power-Aware and QoS Provisioned Real Time Multimedia Transmission in Small Cell Networks
Christos Bouras,Anastasios N. Bikos,Dimitrios Bilios,Antonios Alexiou +3 more
- 01 Jan 2016
TL;DR: A traffic-aware Orthogonal Frequency-Division Multiple-Access (OFDMA) hybrid small-cell deployment for QoS provisioning and an optimal admission control strategy for 4G cellular systems are presented.
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Enhancing Space Security Utilizing the Blockchain: Current Status and Future Directions
Anastasios N. Bikos,Sathish A. P. Kumar +1 more
- 12 Oct 2022
TL;DR: In this paper , a ready-prototyped DLT/IOTA secure framework (SWIoTA) is proposed to provide added-on cybersecurity to the critical space core functionalities, and illuminate the roles of DLT ledger to secure networks of satellites orbits, as well as space tokenization concept.
3
Easily verified IP watermarking
Anastasios N. Bikos,Haridimos T. Vergos +1 more
- 06 May 2014
TL;DR: Experiments on benchmark circuits and an example system-on-chip (SoC) indicate that the overhead of the proposed technique on the delay and area is negligible and extremely small respectively.
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