An-Yeu Wu
National Taiwan University
250 Papers
1.7K Citations
An-Yeu Wu is an academic researcher from National Taiwan University. The author has contributed to research in topics: Computer science & Very-large-scale integration. The author has an hindex of 32, co-authored 250 publications. Previous affiliations of An-Yeu Wu include National Central University & MediaTek.
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Papers
Patent
Network on chip device and on-chip data transmission device
Jhao-Ji Ye,You-Gang Chen,An-Yeu Wu +2 more
- 27 Dec 2006
TL;DR: In this paper, a control signal and a packet are transmitted when a logic level of the control signal changes, where the logic level changes every clock cycle, and the clock cycle is determined by an input signal clock A. The receiver receives the transmitted control signals and a clock B having a clock rate as same as clock A, generates a mixed clock having a phase substantially the same as the phase of the clock B, and receives one transmitted packet per clock B cycle.
3
An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation
Huifei Rao,Jie Chen,V.H. Zhao,Woon T. Ang,I-Chyn Wey,An-Yeu Wu +5 more
- 18 May 2008
TL;DR: An efficient methodology to evaluate nanoscale circuit fault tolerance based on belief propagation (BP) algorithm is proposed and is more efficient in terms of memory requirements and CPU times.
Motion-tracking adaptive persistence and adaptive-size median filter for color Doppler processing in ultrasound systems on multicore platform
Cheng-Zhou Zhan,Kai-Ting Chang,Yu-Hao Chen,Pai-Chi Li,An-Yeu Wu +4 more
- 01 Nov 2010
TL;DR: In this article, the authors proposed the time-domain (1) motion-tracking adaptive persistence and spatialdomain (2) adaptive-size median filter for effectively eliminating the speckle noises, respectively.
Transform-domain delayed LMS algorithm and architecture
An-Yeu Wu,Cheng-Shing Wu +1 more
- 31 May 1998
TL;DR: In this article, a transform-domain DLMS (TD-DLMS) algorithm is proposed to overcome the aforementioned speed degradation, which is derived based on the multirate FIR filtering structure, and the operations are performed in the transform domain.
2
A New Noise-Tolerant Dynamic Circuit Design with Enhanced PDP Performance under Low SNR Environment
You-Gang Chen,I-Chyn Wey,An-Yeu Wu +2 more
- 01 Nov 2006
TL;DR: A new isolated noise-tolerant technique to prevent the dynamic circuit from the noise interference and can save 81% power delay product (PDP) in severe low SNR environment and achieve 81% and 39% energy saving as compared with the conventional domino circuit and twin-transistor design.