A. Tanaka
2 Papers
A. Tanaka is an academic researcher. The author has contributed to research in topics: PIN diode & Conductivity. The author has an hindex of 1, co-authored 2 publications.
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Papers
Conductivity Degradation of 4H-SiC Pin Diode with In-grown Stacking Faults
Abstract: The electrical characteristics of 4H-SiC p–i–n diodes with 8H-type in-grown stacking faults are investigated. The 4H-SiC p–i–n diodes have epilayers with a low Z1/2 center density formed by carbon implantation. The forward voltage drops of the 4H-SiC p–i–n diode with 8H-type in-grown stacking faults are larger than those of the 4H-SiC p–i–n diode without an 8H-type in-grown stacking fault. The differential on-resistance of the 4H-SiC p–i–n diode with 8H-type in-grown stacking faults is larger than the drift resistance of the drift layer calculated from the doping density and thickness of the drift layer. A large number of electrons are trapped at 8H-type in-grown stacking faults, and the effective carrier density decreases compared with the doping density.
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Characteristics of a 4H-SiC Pin Diode With Carbon Implantation/Thermal Oxidation
K. Nakayama,A. Tanaka,M. Nishimura,Katsunori Asano,Tetsuya Miyazawa,M. Ito,Hidekazu Tsuchida +6 more
TL;DR: In this article, the forward voltage drops of pin diodes with the carbon implantation or thermal oxidation process using a drift layer of 120 μm thick are around 4.0 V and are lower than those with the standard process.