http://accentsjournals.org/PaperDirectory/Journal/IJACR/2018/7/5.pdf

An efficient k-means algorithm for the cluster head selection based on SAW and WPM

Wireless sensor networks (WSN) mainly comprise of small sensor nodes which have limited resources Base stations in WSN connect these sensor nodes with the rest of the world The base stations are responsible for handling large amount of data and must have built in computational abilities capable of dealing with those data Network processors (NP) are intended to replace conventional processors in the base station and they can bring the new levels of performances in information processing This paper discusses the design of co-processor which could assist the packet classification for NPs In this work we use neural network to classify the packets based on nature of the data to overcome the traffic in WSN The classification is done using conventional feed-forward back propagation network (BPN), to give optimum result

Packet classification for Network Processors in WSN traffic using ANN

In a bid to improve the interaction between computers and humans, it is becoming necessary to make increasingly larger deployments of sensor networks. These clusters of small electronic devices can be embedded in our surroundings and can detect and react to physical changes. They will make computers more proactive in general by gathering and interpreting useful information about the physical environment through a combination of measurements. Increasing the performance of these devices will mean more intelligence can be embedded within the sensor network. However, most conventional ways of increasing performance often come with the burden of increased power dissipation which is not an option for energy-constrained sensor networks. This thesis proposes, develops and tests a design methodology for performing greater amounts of processing within a sensor network while satisfying the requirement for low energy consumption. The crux of the thesis is that there is a great deal of concurrency present in sensor networks which when combined with a tightlycoupled group of small, fast, energy-conscious processors can result in a significantly more efficient network. The construction of a multiprocessor system aimed at sensor networks is described in detail. It is shown that a routine critical to sensor networks can be sped up with the addition of a small set of primitives. The need for a very fast inter-processor communication mechanism is highlighted, and the hardware scheduler developed as part of this effort forms the cornerstone of the new sentient computing framework by facilitating thread operations and minimising the time required for context-switching. The experimental results also show that end-to-end latency can be reduced in a flexible way through multiprocessing. This thesis is dedicated to my loving parents.

/pdf/energy-efficient-sentient-computing-1hztg7lbu7.pdf

Energy-efficient sentient computing

Design of a Power-aware Dataflow Processor Architecture

Sensor platforms designed with mobility in mind, such as body networks, have inherent scalability problems arising from the conflicting demand for high processing capabilities (to collect, compress, and filter data) and the need for low-power, resource-constrained hardware. This paper presents a CPU design which seeks to optimize processing for a sensor network by improving performance in a power-efficient and scalable manner. We demonstrate the crucial design decisions and trade-offs required in developing such a processing platform and demonstrate that a minimalist design saves power without adverse impact on performance. In addition, we address the problem of scalability in a multithreaded environment through the development of a novel scheduling algorithm implemented directly in hardware.

SpotCore: a power-efficient embedded processor for intelligent sensor networks

Wireless sensor networks are ad hoc networks comprised mainly of small sensor nodes with limited resources and one or more base stations, which are much more powerful laptopclass nodes that connect the sensor nodes to the rest of the world. The advent of this tecnology over the last decade enables largescale deployment of such sensors. On the other hand, this poses the challenging of how the great amount of information generated by these sensor networks will be handled at the base station. In this paper, we propose a network processor architecture tailored specifically to handling information at sensor network base stations. Our approach optimize information processing by implementing tasks in hardware. We show that the novel architecture is one order of magnitude faster than an architecture based on traditional RISC processor.

/pdf/wisenep-a-network-processor-for-wireless-sensor-networks-3mfdtpze22.pdf

WISENEP: A Network Processor for Wireless Sensor Networks

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WISENEP: A Network Processor for Wireless Sensor Networks