Getting output of multiple chips within the volume of a single chip is the driving force behind development of this novel 3D integration technology, which has a broad range of industrial and medical electronic applications. This goal is achieved in a two-step approach. Initially, thinned dies are embedded in a polyimide interposer with a fine-pitch metal fanout, resulting in ultrathin chip packages (UTCPs). Next these UTCPs are stacked by lamination. Step height at the chip edge of these UTCPs is the major reason of die cracking during the lamination. This paper contains an approach to solve this issue by the introduction of an additional layer of interposer, which makes it flat at the chip edge and thus the whole package is named as flat-UTCP. In addition to that, randomness in nonfunctional package positions per panel reduces the overall yield of the whole process up to a certain extent. A detailed analysis on these two issues to improve the process yield is presented in this paper. 3D-stacked memory module composed of four electrically erasable programmable read-only memory dies was processed and tested to demonstrate this new concept for enhancing the fabrication yield.

https://biblio.ugent.be/publication/4095955/file/4252101.pdf

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

A self-assembly process is developed for the placement and alignment of Ultra-Thin Chips (UTCs) to polymer foils. The chips are presented within the working range of a magnetic force field, and subsequently driven to and aligned at a target location. A low-viscosity die attach adhesive layer supports chip mobility during alignment, and is UV-cured after assembly to generate a mechanical bond. An adaptive electrical interconnection scheme compensates the position errors present after assembly. Standard Ni + Au bumps provide sufficient magnetization to generate the required alignment force. Numerical modeling confirms that over a long range magnetic forces operate on a chip and drive it to a target location. Also, an asymmetric bump arrangement supports achieving a unique in-plane orientation. Experimentally, chips with a thickness of 20 μm were successfully trapped and aligned with a repeatability of ±100 μm in x and y-direction, and the best achieved cycle time is below 1.0 s. The cycle time depends considerably on the viscosity of the die attach adhesive. The presence of unique in-plane orientations, depending on the bump arrangement, is demonstrated.

Magnetic Self-Assembly of Ultra-Thin Chips to Polymer Foils

In order to increase the functionality of electronic devices, while reducing the overall size and weight of the electronic chip packages, electronic chip packages can be combined into a 3-D assembly. In this field, we present a technology for stacking multiple chip packages, resulting in total volume almost equal to that of a single bare die. The technology is based on batch-processed ultrathin chip packages (UTCPs) with a fine pitch metal fan-out. Package-on-package technology enables stacking of UTCPs by vacuum lamination, followed by throughhole interconnection technology for making contacts to the metal fan-out of the embedded UTCPs within the stack. The individual chip packages can be tested before stacking.

3-D Stacking of Ultrathin Chip Packages: An Innovative Packaging and Interconnection Technology

https://biblio.ugent.be/publication/4287454/file/4287466.pdf

Design and Technology of Ultra Thin Chip Packages for High-Frequency Applications up to 60 GHz

Autonomous systems for healthcare and sports applications benefit largely from a small form factor, as minute dimensions result in maximal mobility and comfort. By embedding a commercially available IC in a flexible circuit board (FCB), the overall size of a system can be reduced. This work presents the process of thinning and packaging an IC in a flexible interposer, and the embedding thereof in a FCB. To illustrate the potential of this technology towards miniaturization, a commercially available RF transceiver ZL70102 was packaged and embedded, thus realizing a volume reduction of 60%.

https://biblio.ugent.be/publication/3169692/file/3169707.pdf

Embedding thinned chips in flexible PCBs

Getting output of multiple chips within the volume of a single chip is the driving force behind development of this novel 3D integration technology which has a broad range of industrial and medical electronic applications. This can be achieved by laminating multiple layers of spin-on polyimide based ultrathin chip packages (UTCPs) with fine pitch through hole interconnects.

/pdf/an-approach-to-produce-a-stack-of-photo-definable-polyimide-5dyldhb886.pdf

An approach to produce a stack of photo definable polyimide based flat UTCPs

3D-stacking of Ultra Thin Chip Packages (UTCP’s) – one of the emerging technologies in the field of high density integration - is presented here. This technology is developed to increase the functionality of the electronic devices and to raise the comfort zone by reducing the overall size and weight of the package. This has a bright future in the area of mobile communication, medical equipments like hearing aids, implants, patient monitoring. This paper describes an approach to produce miniaturized modular packages by using Ultrathin Chip Package Technology, stacking and through-hole (TH) interconnection technology. UTCP technology is a board level packaging concept, based on embedding of ultra-thin chips (∼20 μm) within two 20 μm thick spin-on polyimide layers resulting in a thin flexible chip package of thickness ∼50 μm. Stacking of the 4 layers of UTCPs by using 25 μm thick layers of adhesive films and vacuum lamination processes results in stacked UTCP modules of total thickness ∼300 μm. The connectio...

3D-stacking of UTCPs as a module miniaturization technology

Handle everyday research tasks with reliable, citation-backed results

Your personal Research Agent to handle research tasks with citation-backed results

Popular Tasks used by Researchers

How can I help with your research?

Meet SciSpace

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

A.E. Petersen

Author Tools

Chat about Author

Papers

An approach to produce a stack of photo definable polyimide based flat UTCPs

3D-stacking of UTCPs as a module miniaturization technology