A. D. Trigg
Agency for Science, Technology and Research
26 Papers
85 Citations
A. D. Trigg is an academic researcher from Agency for Science, Technology and Research. The author has contributed to research in topics: Wire bonding & Stress (mechanics). The author has an hindex of 9, co-authored 26 publications.
Chat about Author
Papers
Effect of Copper TSV Annealing on Via Protrusion for TSV Wafer Fabrication
A. Heryanto,A. Heryanto,W. N. Putra,W. N. Putra,A. D. Trigg,S. Gao,Woon-Seong Kwon,Fa Xing Che,X. F. Ang,Jun Wei,Riko I Made,Chee Lip Gan,Kin Leong Pey,Kin Leong Pey +13 more
TL;DR: In this paper, the authors studied the phenomenon of Cu protrusion and microstructural changes during thermal annealing of a TSV wafer, and proposed a model to provide insight into the failure mechanism.
135
Study on Cu Protrusion of Through-Silicon Via
TL;DR: In this paper, a finite element analysis (FEA) is carried out to study the Cu protrusion under different annealing conditions and correlation between numerical results and experimental data is then carried out.
85
Three Dimensional Stress Mapping of Silicon Surrounded by Copper Filled through Silicon Vias Using Polychromator-Based Multi-Wavelength Micro Raman Spectroscopy
A. D. Trigg,Li Hong Yu,Cheng Kuo Cheng,Rakesh Kumar,Dim-Lee Kwong,Takeshi Ueda,Toshikazu Ishigaki,Kitaek Kang,Woo Sik Yoo +8 more
TL;DR: In this paper, three dimensional (3D) stress distributions in Si, surrounded by copper (Cu) filled through silicon vias (TSVs) with various dimensions and pitches, are non-destructively characterized and stress contour maps generated at different depths using a long focal length, polychromator-based, multi-wavelength micro-Raman spectroscopy system.
47
Design and fabrication of a reliability test chip for 3D-TSV
A. D. Trigg,Li Hong Yu,Xiaowu Zhang,Chai Tai Chong,Cheng Cheng Kuo,N. Khan,Yu Daquan +6 more
- 01 Jun 2010
TL;DR: In this paper, a test chip has been designed and fabricated to validate the performance, yield and reliability of 3D chipstacks using Through Silicon Vias (TSVs), and the test chip contains test structures designed to measure the electromigration performance of TSVs and microbump.
31
In Situ Measurement and Stress Evaluation for Wire Bonding Using Embedded Piezoresistive Stress Sensors
TL;DR: In this article, the impact force flattening the free-air ball introduces significant localized out-of-plane compressive stress on the pad and the low-k structure beneath, and the subsequent process of US bonding induces in-plane and shear stresses to the structure.
22